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# 2b95bc24d7d6 oxygen / vendor / crc-fast / src / crc16 / mod.rs
11.2 KiB · Rust · last changed Strata: the cloud stores send through ureq, so every release target links 1 month ago source blame history raw
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// Copyright 2025 Don MacAskill. Licensed under MIT or Apache-2.0.
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pub(crate) mod algorithm;
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pub(crate) mod consts;
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#[cfg(test)]
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mod property_tests {
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    use crate::crc16::consts::{CRC16_IBM_SDLC, CRC16_T10_DIF};
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    use crate::test::consts::{RUST_CRC16_IBM_SDLC, RUST_CRC16_T10_DIF};
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    use crate::test::miri_compatible_proptest_config;
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    use crate::{
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        checksum, checksum_combine, checksum_combine_with_params, checksum_with_params,
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        CrcAlgorithm, CrcParams,
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    };
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    use proptest::prelude::*;
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    proptest! {
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        #![proptest_config(miri_compatible_proptest_config())]
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        /// Feature: crc16-hardware-acceleration, Property 3: CRC-16 computation matches reference
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        /// *For any* valid CRC-16 parameters (polynomial, init, refin, refout, xorout) and any
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        /// input byte sequence, the computed CRC-16 checksum SHALL match the result from the
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        /// `crc` crate reference implementation.
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        /// **Validates: Requirements 2.1, 2.2, 5.5, 6.1, 6.2, 6.3**
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        #[test]
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        fn prop_crc16_ibm_sdlc_matches_reference(data in proptest::collection::vec(any::<u8>(), 0..1024)) {
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            let our_result = checksum(CrcAlgorithm::Crc16IbmSdlc, &data);
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            let reference_result = RUST_CRC16_IBM_SDLC.checksum(&data) as u64;
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            prop_assert_eq!(
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                our_result, reference_result,
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                "CRC-16/IBM-SDLC mismatch for {} bytes: our=0x{:04X}, ref=0x{:04X}",
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                data.len(), our_result, reference_result
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 3: CRC-16 computation matches reference
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        /// *For any* valid CRC-16 parameters (polynomial, init, refin, refout, xorout) and any
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        /// input byte sequence, the computed CRC-16 checksum SHALL match the result from the
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        /// `crc` crate reference implementation.
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        /// **Validates: Requirements 2.1, 2.2, 5.5, 6.1, 6.2, 6.3**
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        #[test]
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        fn prop_crc16_t10_dif_matches_reference(data in proptest::collection::vec(any::<u8>(), 0..1024)) {
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            let our_result = checksum(CrcAlgorithm::Crc16T10Dif, &data);
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            let reference_result = RUST_CRC16_T10_DIF.checksum(&data) as u64;
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            prop_assert_eq!(
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                our_result, reference_result,
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                "CRC-16/T10-DIF mismatch for {} bytes: our=0x{:04X}, ref=0x{:04X}",
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                data.len(), our_result, reference_result
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 3: CRC-16 computation matches reference
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        /// Tests checksum_with_params for CRC-16/IBM-SDLC (reflected variant)
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        /// **Validates: Requirements 5.5, 6.1, 6.2, 6.3**
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        #[test]
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        fn prop_crc16_ibm_sdlc_with_params_matches_reference(data in proptest::collection::vec(any::<u8>(), 0..1024)) {
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            let our_result = checksum_with_params(CRC16_IBM_SDLC, &data);
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            let reference_result = RUST_CRC16_IBM_SDLC.checksum(&data) as u64;
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            prop_assert_eq!(
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                our_result, reference_result,
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                "CRC-16/IBM-SDLC (with_params) mismatch for {} bytes: our=0x{:04X}, ref=0x{:04X}",
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                data.len(), our_result, reference_result
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 3: CRC-16 computation matches reference
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        /// Tests checksum_with_params for CRC-16/T10-DIF (forward variant)
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        /// **Validates: Requirements 5.5, 6.1, 6.2, 6.3**
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        #[test]
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        fn prop_crc16_t10_dif_with_params_matches_reference(data in proptest::collection::vec(any::<u8>(), 0..1024)) {
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            let our_result = checksum_with_params(CRC16_T10_DIF, &data);
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            let reference_result = RUST_CRC16_T10_DIF.checksum(&data) as u64;
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            prop_assert_eq!(
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                our_result, reference_result,
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                "CRC-16/T10-DIF (with_params) mismatch for {} bytes: our=0x{:04X}, ref=0x{:04X}",
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                data.len(), our_result, reference_result
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 3: CRC-16 computation matches reference
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        /// Tests custom CRC-16 parameters (equivalent to IBM-SDLC) to validate CrcParams::new()
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        /// **Validates: Requirements 5.5, 6.1, 6.2, 6.3**
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        #[test]
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        fn prop_crc16_custom_reflected_matches_reference(data in proptest::collection::vec(any::<u8>(), 0..1024)) {
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            // Custom CRC-16 parameters equivalent to CRC-16/IBM-SDLC
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            let custom_params = CrcParams::new(
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                "CRC-16/CUSTOM-REFLECTED",
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                16,
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                0x1021,
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                0xFFFF,
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                true,  // reflected
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                0xFFFF,
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                0x906E,
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            );
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            let our_result = checksum_with_params(custom_params, &data);
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            let reference_result = RUST_CRC16_IBM_SDLC.checksum(&data) as u64;
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            prop_assert_eq!(
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                our_result, reference_result,
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                "CRC-16 custom reflected mismatch for {} bytes: our=0x{:04X}, ref=0x{:04X}",
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                data.len(), our_result, reference_result
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 3: CRC-16 computation matches reference
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        /// Tests custom CRC-16 parameters (equivalent to T10-DIF) to validate CrcParams::new()
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        /// **Validates: Requirements 5.5, 6.1, 6.2, 6.3**
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        #[test]
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        fn prop_crc16_custom_forward_matches_reference(data in proptest::collection::vec(any::<u8>(), 0..1024)) {
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            // Custom CRC-16 parameters equivalent to CRC-16/T10-DIF
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            let custom_params = CrcParams::new(
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                "CRC-16/CUSTOM-FORWARD",
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                16,
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                0x8BB7,
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                0x0000,
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                false,  // forward (non-reflected)
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                0x0000,
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                0xD0DB,
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            );
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            let our_result = checksum_with_params(custom_params, &data);
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            let reference_result = RUST_CRC16_T10_DIF.checksum(&data) as u64;
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            prop_assert_eq!(
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                our_result, reference_result,
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                "CRC-16 custom forward mismatch for {} bytes: our=0x{:04X}, ref=0x{:04X}",
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                data.len(), our_result, reference_result
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 5: CRC-16 checksum combination round-trip
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        /// *For any* valid CRC-16 parameters and any two input byte sequences A and B,
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        /// `checksum_combine(checksum(A), checksum(B), len(B))` SHALL equal `checksum(A + B)`.
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        /// **Validates: Requirements 6.4**
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        #[test]
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        fn prop_crc16_ibm_sdlc_checksum_combine_roundtrip(
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            data_a in proptest::collection::vec(any::<u8>(), 0..512),
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            data_b in proptest::collection::vec(any::<u8>(), 0..512)
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        ) {
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            let checksum_a = checksum(CrcAlgorithm::Crc16IbmSdlc, &data_a);
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            let checksum_b = checksum(CrcAlgorithm::Crc16IbmSdlc, &data_b);
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            let combined = checksum_combine(
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                CrcAlgorithm::Crc16IbmSdlc,
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                checksum_a,
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                checksum_b,
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                data_b.len() as u64,
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            );
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            let mut concatenated = data_a.clone();
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            concatenated.extend(&data_b);
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            let expected = checksum(CrcAlgorithm::Crc16IbmSdlc, &concatenated);
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            prop_assert_eq!(
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                combined, expected,
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                "CRC-16/IBM-SDLC combine mismatch: combined=0x{:04X}, expected=0x{:04X}, len_a={}, len_b={}",
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                combined, expected, data_a.len(), data_b.len()
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 5: CRC-16 checksum combination round-trip
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        /// *For any* valid CRC-16 parameters and any two input byte sequences A and B,
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        /// `checksum_combine(checksum(A), checksum(B), len(B))` SHALL equal `checksum(A + B)`.
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        /// **Validates: Requirements 6.4**
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        #[test]
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        fn prop_crc16_t10_dif_checksum_combine_roundtrip(
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            data_a in proptest::collection::vec(any::<u8>(), 0..512),
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            data_b in proptest::collection::vec(any::<u8>(), 0..512)
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        ) {
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            let checksum_a = checksum(CrcAlgorithm::Crc16T10Dif, &data_a);
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            let checksum_b = checksum(CrcAlgorithm::Crc16T10Dif, &data_b);
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            let combined = checksum_combine(
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                CrcAlgorithm::Crc16T10Dif,
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                checksum_a,
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                checksum_b,
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                data_b.len() as u64,
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            );
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            let mut concatenated = data_a.clone();
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            concatenated.extend(&data_b);
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            let expected = checksum(CrcAlgorithm::Crc16T10Dif, &concatenated);
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            prop_assert_eq!(
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                combined, expected,
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                "CRC-16/T10-DIF combine mismatch: combined=0x{:04X}, expected=0x{:04X}, len_a={}, len_b={}",
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                combined, expected, data_a.len(), data_b.len()
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 5: CRC-16 checksum combination round-trip
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        /// Tests checksum_combine_with_params for CRC-16/IBM-SDLC
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        /// **Validates: Requirements 6.4**
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        #[test]
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        fn prop_crc16_ibm_sdlc_checksum_combine_with_params_roundtrip(
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            data_a in proptest::collection::vec(any::<u8>(), 0..512),
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            data_b in proptest::collection::vec(any::<u8>(), 0..512)
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        ) {
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            let checksum_a = checksum_with_params(CRC16_IBM_SDLC, &data_a);
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            let checksum_b = checksum_with_params(CRC16_IBM_SDLC, &data_b);
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            let combined = checksum_combine_with_params(
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                CRC16_IBM_SDLC,
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                checksum_a,
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                checksum_b,
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                data_b.len() as u64,
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            );
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            let mut concatenated = data_a.clone();
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            concatenated.extend(&data_b);
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            let expected = checksum_with_params(CRC16_IBM_SDLC, &concatenated);
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            prop_assert_eq!(
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                combined, expected,
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                "CRC-16/IBM-SDLC combine_with_params mismatch: combined=0x{:04X}, expected=0x{:04X}, len_a={}, len_b={}",
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                combined, expected, data_a.len(), data_b.len()
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            );
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        }
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        /// Feature: crc16-hardware-acceleration, Property 5: CRC-16 checksum combination round-trip
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        /// Tests checksum_combine_with_params for CRC-16/T10-DIF
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        /// **Validates: Requirements 6.4**
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        #[test]
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        fn prop_crc16_t10_dif_checksum_combine_with_params_roundtrip(
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            data_a in proptest::collection::vec(any::<u8>(), 0..512),
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            data_b in proptest::collection::vec(any::<u8>(), 0..512)
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        ) {
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            let checksum_a = checksum_with_params(CRC16_T10_DIF, &data_a);
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            let checksum_b = checksum_with_params(CRC16_T10_DIF, &data_b);
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            let combined = checksum_combine_with_params(
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                CRC16_T10_DIF,
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                checksum_a,
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                checksum_b,
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                data_b.len() as u64,
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            );
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            let mut concatenated = data_a.clone();
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            concatenated.extend(&data_b);
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            let expected = checksum_with_params(CRC16_T10_DIF, &concatenated);
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            prop_assert_eq!(
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                combined, expected,
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                "CRC-16/T10-DIF combine_with_params mismatch: combined=0x{:04X}, expected=0x{:04X}, len_a={}, len_b={}",
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                combined, expected, data_a.len(), data_b.len()
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            );
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        }
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    }
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}