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# 2980b7b6d7cd enhanced-x16-emulator / src / insn_info.c
14.1 KiB · C · last changed chore(): initial commit 26 days ago source blame history raw
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// Commander X16 Emulator
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// Instruction reference data for the debugger. See insn_info.h.
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#include "insn_info.h"
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#include <stdio.h>
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#include <string.h>
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#ifdef _MSC_VER
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#define strcasecmp _stricmp
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#else
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#include <strings.h>
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#endif
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#define NZ   (INSN_FLAG_N | INSN_FLAG_Z)
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#define NZC  (NZ | INSN_FLAG_C)
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#define NZCV (NZC | INSN_FLAG_V)
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// Keyed by mnemonic, covering the 65C02 set plus the 65C816 additions. Several
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// mnemonics cover many opcodes/addressing modes; the description is the same for
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// all of them, and the addressing mode is already visible in the operand text.
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static const insn_info_t table[] = {
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	// ---- loads / stores ----
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	{ "lda", "Load Accumulator",        "A = operand",                                  INSN_KIND_LOAD,  NZ, 0, false },
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	{ "ldx", "Load X",                  "X = operand",                                  INSN_KIND_LOAD,  NZ, 0, false },
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	{ "ldy", "Load Y",                  "Y = operand",                                  INSN_KIND_LOAD,  NZ, 0, false },
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	{ "sta", "Store Accumulator",       "operand = A",                                  INSN_KIND_STORE, 0,  0, false },
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	{ "stx", "Store X",                 "operand = X",                                  INSN_KIND_STORE, 0,  0, false },
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	{ "sty", "Store Y",                 "operand = Y",                                  INSN_KIND_STORE, 0,  0, false },
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	{ "stz", "Store Zero",              "operand = 0",                                  INSN_KIND_STORE, 0,  0, false },
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	// ---- transfers ----
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	{ "tax", "Transfer A to X",         "X = A",                                        INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "tay", "Transfer A to Y",         "Y = A",                                        INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "txa", "Transfer X to A",         "A = X",                                        INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "tya", "Transfer Y to A",         "A = Y",                                        INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "tsx", "Transfer SP to X",        "X = SP",                                       INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "txs", "Transfer X to SP",        "SP = X",                                       INSN_KIND_TRANSFER, 0,  0, false },
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	{ "tcd", "Transfer C to DP",        "DP = C (65C816)",                              INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "tdc", "Transfer DP to C",        "C = DP (65C816)",                              INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "tcs", "Transfer C to SP",        "SP = C (65C816)",                              INSN_KIND_TRANSFER, 0,  0, false },
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	{ "tsc", "Transfer SP to C",        "C = SP (65C816)",                              INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "txy", "Transfer X to Y",         "Y = X (65C816)",                               INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "tyx", "Transfer Y to X",         "X = Y (65C816)",                               INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "xba", "Exchange B and A",        "swaps the two halves of C (65C816)",           INSN_KIND_TRANSFER, NZ, 0, false },
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	{ "xce", "Exchange Carry and E",    "swaps C with the emulation flag - the only "
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	                                    "way to switch CPU mode (65C816)",              INSN_KIND_FLAG, INSN_FLAG_C, 0, false },
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	// ---- arithmetic / logic ----
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	{ "adc", "Add with Carry",          "A = A + operand + C",                          INSN_KIND_ALU, NZCV, 0, false },
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	{ "sbc", "Subtract with Carry",     "A = A - operand - (1-C)",                      INSN_KIND_ALU, NZCV, 0, false },
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	{ "and", "Logical AND",             "A = A & operand",                              INSN_KIND_ALU, NZ, 0, false },
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	{ "ora", "Logical OR",              "A = A | operand",                              INSN_KIND_ALU, NZ, 0, false },
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	{ "eor", "Exclusive OR",            "A = A ^ operand",                              INSN_KIND_ALU, NZ, 0, false },
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	// ---- compares ----
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	{ "cmp", "Compare Accumulator",     "sets flags from A - operand (A unchanged)",    INSN_KIND_COMPARE, NZC, 0, false },
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	{ "cpx", "Compare X",               "sets flags from X - operand (X unchanged)",    INSN_KIND_COMPARE, NZC, 0, false },
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	{ "cpy", "Compare Y",               "sets flags from Y - operand (Y unchanged)",    INSN_KIND_COMPARE, NZC, 0, false },
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	{ "bit", "Bit Test",                "Z from A & operand; N and V from operand bits 7 and 6",
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	                                                                                    INSN_KIND_BIT, (NZ | INSN_FLAG_V), 0, false },
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	// ---- increment / decrement ----
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	{ "inc", "Increment",               "operand = operand + 1 (A when no operand)",    INSN_KIND_INCDEC, NZ, 0, false },
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	{ "dec", "Decrement",               "operand = operand - 1 (A when no operand)",    INSN_KIND_INCDEC, NZ, 0, false },
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	{ "inx", "Increment X",             "X = X + 1",                                    INSN_KIND_INCDEC, NZ, 0, false },
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	{ "iny", "Increment Y",             "Y = Y + 1",                                    INSN_KIND_INCDEC, NZ, 0, false },
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	{ "dex", "Decrement X",             "X = X - 1",                                    INSN_KIND_INCDEC, NZ, 0, false },
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	{ "dey", "Decrement Y",             "Y = Y - 1",                                    INSN_KIND_INCDEC, NZ, 0, false },
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	// ---- shifts / rotates ----
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	{ "asl", "Arithmetic Shift Left",   "operand <<= 1; C = old bit 7",                 INSN_KIND_SHIFT, NZC, 0, false },
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	{ "lsr", "Logical Shift Right",     "operand >>= 1; C = old bit 0",                 INSN_KIND_SHIFT, NZC, 0, false },
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	{ "rol", "Rotate Left",             "operand <<= 1 through C",                      INSN_KIND_SHIFT, NZC, 0, false },
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	{ "ror", "Rotate Right",            "operand >>= 1 through C",                      INSN_KIND_SHIFT, NZC, 0, false },
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	{ "trb", "Test and Reset Bits",     "Z from A & operand; clears the bits of A in operand",
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	                                                                                    INSN_KIND_BIT, INSN_FLAG_Z, 0, false },
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	{ "tsb", "Test and Set Bits",       "Z from A & operand; sets the bits of A in operand",
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	                                                                                    INSN_KIND_BIT, INSN_FLAG_Z, 0, false },
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	{ "rmb", "Reset Memory Bit",        "clears one bit of the operand",                INSN_KIND_BIT, 0, 0, false },
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	{ "smb", "Set Memory Bit",          "sets one bit of the operand",                  INSN_KIND_BIT, 0, 0, false },
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	// ---- branches ----
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	{ "bcc", "Branch if Carry Clear",   "taken when C = 0",  INSN_KIND_BRANCH, 0, INSN_FLAG_C, false },
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	{ "bcs", "Branch if Carry Set",     "taken when C = 1",  INSN_KIND_BRANCH, 0, INSN_FLAG_C, true  },
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	{ "beq", "Branch if Equal",         "taken when Z = 1",  INSN_KIND_BRANCH, 0, INSN_FLAG_Z, true  },
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	{ "bne", "Branch if Not Equal",     "taken when Z = 0",  INSN_KIND_BRANCH, 0, INSN_FLAG_Z, false },
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	{ "bmi", "Branch if Minus",         "taken when N = 1",  INSN_KIND_BRANCH, 0, INSN_FLAG_N, true  },
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	{ "bpl", "Branch if Plus",          "taken when N = 0",  INSN_KIND_BRANCH, 0, INSN_FLAG_N, false },
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	{ "bvc", "Branch if Overflow Clear","taken when V = 0",  INSN_KIND_BRANCH, 0, INSN_FLAG_V, false },
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	{ "bvs", "Branch if Overflow Set",  "taken when V = 1",  INSN_KIND_BRANCH, 0, INSN_FLAG_V, true  },
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	{ "bra", "Branch Always",           "always taken",      INSN_KIND_JUMP,   0, 0, false },
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	{ "brl", "Branch Long",             "always taken, 16-bit displacement (65C816)",
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	                                                         INSN_KIND_JUMP,   0, 0, false },
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	{ "bbr", "Branch on Bit Reset",     "taken when the tested bit of the operand is 0",
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	                                                         INSN_KIND_BRANCH, 0, 0, false },
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	{ "bbs", "Branch on Bit Set",       "taken when the tested bit of the operand is 1",
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	                                                         INSN_KIND_BRANCH, 0, 0, false },
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	// ---- jumps / calls / returns ----
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	{ "jmp", "Jump",                    "PC = operand",                                 INSN_KIND_JUMP, 0, 0, false },
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	{ "jml", "Jump Long",               "PC and program bank = operand (65C816)",       INSN_KIND_JUMP, 0, 0, false },
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	{ "jsr", "Jump to Subroutine",      "pushes the return address, then PC = operand", INSN_KIND_JUMP, 0, 0, false },
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	{ "jsl", "Jump to Subroutine Long", "pushes bank and return address (65C816)",      INSN_KIND_JUMP, 0, 0, false },
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	{ "rts", "Return from Subroutine",  "pulls the return address into PC",             INSN_KIND_RETURN, 0, 0, false },
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	{ "rtl", "Return from Subroutine Long", "pulls address and bank (65C816)",          INSN_KIND_RETURN, 0, 0, false },
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	{ "rti", "Return from Interrupt",   "pulls the status register, then the return address",
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	                                                                                    INSN_KIND_RETURN, 0xFF, 0, false },
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	// ---- stack ----
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	{ "pha", "Push A",                  "pushes the accumulator",                       INSN_KIND_STACK, 0, 0, false },
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	{ "phx", "Push X",                  "pushes X",                                     INSN_KIND_STACK, 0, 0, false },
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	{ "phy", "Push Y",                  "pushes Y",                                     INSN_KIND_STACK, 0, 0, false },
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	{ "php", "Push Status",             "pushes the status register",                   INSN_KIND_STACK, 0, 0, false },
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	{ "phb", "Push Data Bank",          "pushes DB (65C816)",                           INSN_KIND_STACK, 0, 0, false },
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	{ "phd", "Push Direct Page",        "pushes DP (65C816)",                           INSN_KIND_STACK, 0, 0, false },
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	{ "phk", "Push Program Bank",       "pushes K (65C816)",                            INSN_KIND_STACK, 0, 0, false },
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	{ "pla", "Pull A",                  "pulls into the accumulator",                   INSN_KIND_STACK, NZ, 0, false },
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	{ "plx", "Pull X",                  "pulls into X",                                 INSN_KIND_STACK, NZ, 0, false },
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	{ "ply", "Pull Y",                  "pulls into Y",                                 INSN_KIND_STACK, NZ, 0, false },
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	{ "plp", "Pull Status",             "pulls the status register",                    INSN_KIND_STACK, 0xFF, 0, false },
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	{ "plb", "Pull Data Bank",          "pulls into DB (65C816)",                       INSN_KIND_STACK, NZ, 0, false },
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	{ "pld", "Pull Direct Page",        "pulls into DP (65C816)",                       INSN_KIND_STACK, NZ, 0, false },
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	{ "pea", "Push Effective Address",  "pushes the 16-bit operand (65C816)",           INSN_KIND_STACK, 0, 0, false },
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	{ "pei", "Push Effective Indirect", "pushes the word at the direct-page operand (65C816)",
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	                                                                                    INSN_KIND_STACK, 0, 0, false },
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	{ "per", "Push Effective Relative", "pushes a PC-relative address (65C816)",        INSN_KIND_STACK, 0, 0, false },
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	// ---- flags ----
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	{ "clc", "Clear Carry",             "C = 0",                        INSN_KIND_FLAG, INSN_FLAG_C, 0, false },
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	{ "sec", "Set Carry",               "C = 1",                        INSN_KIND_FLAG, INSN_FLAG_C, 0, false },
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	{ "cld", "Clear Decimal",           "D = 0 (binary arithmetic)",    INSN_KIND_FLAG, INSN_FLAG_D, 0, false },
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	{ "sed", "Set Decimal",             "D = 1 (BCD arithmetic)",       INSN_KIND_FLAG, INSN_FLAG_D, 0, false },
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	{ "cli", "Clear Interrupt Disable", "I = 0 (IRQs allowed)",         INSN_KIND_FLAG, INSN_FLAG_I, 0, false },
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	{ "sei", "Set Interrupt Disable",   "I = 1 (IRQs masked)",          INSN_KIND_FLAG, INSN_FLAG_I, 0, false },
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	{ "clv", "Clear Overflow",          "V = 0",                        INSN_KIND_FLAG, INSN_FLAG_V, 0, false },
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	{ "rep", "Reset Status Bits",       "clears the status bits set in the operand (65C816)",
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	                                                                    INSN_KIND_FLAG, 0xFF, 0, false },
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	{ "sep", "Set Status Bits",         "sets the status bits set in the operand (65C816)",
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	                                                                    INSN_KIND_FLAG, 0xFF, 0, false },
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	// ---- misc ----
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	{ "brk", "Break",                   "software interrupt through the IRQ/BRK vector", INSN_KIND_INTERRUPT, INSN_FLAG_I | INSN_FLAG_D, 0, false },
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	{ "cop", "Coprocessor",             "software interrupt through the COP vector (65C816)",
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	                                                                     INSN_KIND_INTERRUPT, INSN_FLAG_I | INSN_FLAG_D, 0, false },
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	{ "nop", "No Operation",            "does nothing",                  INSN_KIND_NOP, 0, 0, false },
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	{ "wai", "Wait for Interrupt",      "halts the CPU until an interrupt arrives",      INSN_KIND_OTHER, 0, 0, false },
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	{ "stp", "Stop",                    "stops the CPU until reset",                     INSN_KIND_OTHER, 0, 0, false },
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	{ "wdm", "Reserved",                "reserved 65C816 opcode; acts as a 2-byte NOP",  INSN_KIND_NOP, 0, 0, false },
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	{ "mvn", "Block Move Next",         "copies a block upward (65C816)",                INSN_KIND_OTHER, 0, 0, false },
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	{ "mvp", "Block Move Previous",     "copies a block downward (65C816)",              INSN_KIND_OTHER, 0, 0, false },
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};
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#define TABLE_COUNT ((int)(sizeof(table) / sizeof(table[0])))
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const insn_info_t *
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insn_info_lookup(const char *mnemonic)
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{
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	if (!mnemonic || !mnemonic[0]) {
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		return NULL;
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	}
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	for (int i = 0; i < TABLE_COUNT; i++) {
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		if (strcasecmp(table[i].mnemonic, mnemonic) == 0) {
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			return &table[i];
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		}
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	}
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	// The bit-addressed 65C02 forms are emitted with the bit number appended
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	// (rmb0..rmb7, smb0..smb7, bbr0..bbr7, bbs0..bbs7); match on the stem.
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	size_t len = strlen(mnemonic);
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	if (len == 4 && mnemonic[3] >= '0' && mnemonic[3] <= '7') {
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		char stem[4] = { mnemonic[0], mnemonic[1], mnemonic[2], '\0' };
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		for (int i = 0; i < TABLE_COUNT; i++) {
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			if (strcasecmp(table[i].mnemonic, stem) == 0) {
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				return &table[i];
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			}
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		}
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	}
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	return NULL;
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}
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void
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insn_info_flag_text(uint8_t flags_set, char *out, unsigned int max)
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{
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	static const char *names[8] = { "N", "V", "M", "X", "D", "I", "Z", "C" };
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	unsigned int       n        = 0;
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	if (!out || max == 0) {
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		return;
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	}
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	out[0] = '\0';
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	for (int bit = 7; bit >= 0; bit--) {
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		if (!(flags_set & (1u << bit))) {
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			continue;
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		}
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		const char *nm = names[7 - bit];
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		unsigned int need = (unsigned int)strlen(nm) + (n ? 1u : 0u);
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		if (n + need + 1 >= max) {
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			break;
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		}
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		if (n) {
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			out[n++] = ' ';
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		}
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		strcpy(out + n, nm);
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		n += (unsigned int)strlen(nm);
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	}
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	out[n] = '\0';
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}