; *******************************************************************************************

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;

;		File:		65c02.opcodes

;		Date:		3rd September 2019

;		Purpose:	Descriptor file, extra 65C02 opcodes

;		Author:		Paul Robson ([email protected])

;

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; *******************************************************************************************

adc ind0 5 $72

and ind0 5 $32

cmp ind0 5 $d2

eor ind0 5 $52

lda ind0 5 $b2

ora ind0 5 $12

sbc ind0 5 $f2

sta ind0 5 $92

bit immm 2 $89

bit zpx 4 $34

bit absx 4 $3c

dec acc 2 $3a

inc acc 2 $1a

jmp ainx 6 $7c

bra rel 3 $80

phx imp 3 $da

phy imp 3 $5a

plx imp 4 $fa

ply imp 4 $7a

stz zp 3 $64

stz zpx 4 $74

stz abso 4 $9c

stz absx 5 $9e

trb zp 5 $14

trb abso 6 $1c

tsb zp 5 $04

tsb abso 6 $0c

bbr0 zprel 5 $0f

bbr1 zprel 5 $1f

bbr2 zprel 5 $2f

bbr3 zprel 5 $3f

bbr4 zprel 5 $4f

bbr5 zprel 5 $5f

bbr6 zprel 5 $6f

bbr7 zprel 5 $7f

bbs0 zprel 5 $8f

bbs1 zprel 5 $9f

bbs2 zprel 5 $af

bbs3 zprel 5 $bf

bbs4 zprel 5 $cf

bbs5 zprel 5 $df

bbs6 zprel 5 $ef

bbs7 zprel 5 $ff

rmb0 zp 5 $07

rmb1 zp 5 $17

rmb2 zp 5 $27

rmb3 zp 5 $37

rmb4 zp 5 $47

rmb5 zp 5 $57

rmb6 zp 5 $67

rmb7 zp 5 $77

smb0 zp 5 $87

smb1 zp 5 $97

smb2 zp 5 $a7

smb3 zp 5 $b7

smb4 zp 5 $c7

smb5 zp 5 $d7

smb6 zp 5 $e7

smb7 zp 5 $f7

wai imp 3 $cb

dbg imp 1 $DB

; $5C is 8 cycles, per both the WDC W65C02S datasheet opcode matrix and the

; 6502.org 65C02 opcode list. SingleStepTests says 4, so processor_tests

; reports $5C as diverging on cycles. That divergence is deliberate and

; recorded in the baseline: do not "fix" it to 4 to make the test green.

nop abso 8 $5c

nop abso 4 $dc

nop abso 4 $fc

; The 65C02 retimed these relative to the NMOS part, so they override the

; entries in 6502.opcodes rather than adding to them.

;

; JMP (abs) costs a cycle more: the NMOS page-wrap bug is fixed here, and the

; correction costs the extra read.

jmp ind 6 $6c

;

; The read-modify-write absolute,X instructions cost one less, and take the

; extra cycle only when indexing crosses a page. The NMOS part always paid it.

; The instructions set penaltyop only when running as a 65C02, so the 65816

; keeps its own flat timing.

asl absx 6 $1e

rol absx 6 $3e

lsr absx 6 $5e

ror absx 6 $7e

nop imm8 2 $02

nop imm8 2 $22

nop imm8 2 $42

nop imm8 3 $44

nop imm8 4 $54

nop imm8 2 $62

nop imm8 2 $82

nop imm8 2 $c2

nop imm8 4 $d4

nop imm8 2 $e2

nop imm8 4 $f4