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◆ main openmsx / src / cpu / MSXCPU.hh
7.9 KiB · C++ · last changed chore(): initial commit 1 month ago source blame history raw
e8555c89 Andy McCall 1 
#ifndef MSXCPU_HH
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#define MSXCPU_HH
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#include "CacheLine.hh"
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#include "BooleanSetting.hh"
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#include "EmuTime.hh"
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#include "InfoTopic.hh"
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#include "Observer.hh"
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#include "SimpleDebuggable.hh"
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#include "TclCallback.hh"
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#include "serialize_meta.hh"
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#include <array>
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#include <cstdint>
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#include <memory>
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#include <span>
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namespace openmsx {
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class MSXMotherBoard;
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class MSXCPUInterface;
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class CPUClock;
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class CPURegs;
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class Z80TYPE;
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class R800TYPE;
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template<typename T> class CPUCore;
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class TclObject;
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class Interpreter;
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class MSXCPU final : private Observer<Setting>
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{
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public:
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	enum class Type : uint8_t { Z80, R800 };
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	explicit MSXCPU(MSXMotherBoard& motherboard);
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	~MSXCPU();
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	/** Reset CPU.
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	  * Requires CPU is not in the middle of an instruction,
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	  * so exitCPULoop was called and execute() method returned.
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	 */
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	void doReset(EmuTime time);
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	/** Switch between Z80/R800. */
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	void setActiveCPU(Type cpu);
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	/** Sets DRAM or ROM mode (influences memory access speed for R800). */
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	void setDRAMmode(bool dram);
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	/** Inform CPU of bank switch. This will invalidate memory cache and
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	  * update memory timings on R800. */
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	void updateVisiblePage(uint8_t page, uint8_t primarySlot, uint8_t secondarySlot);
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	/** Invalidate the CPU its cache for the interval [start, start + size)
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	  * For example MSXMemoryMapper and MSXGameCartridge need to call this
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	  * method when a 'memory switch' occurs. */
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	void invalidateAllSlotsRWCache(uint16_t start, unsigned size);
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	/** Similar to the method above, but only invalidates one specific slot.
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	  * One small tweak: lines that are in 'disallowRead/Write' are
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	  * immediately marked as 'non-cacheable' instead of (first) as
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	  * 'unknown'.
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	  */
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	void invalidateRWCache(unsigned start, unsigned size, int ps, int ss,
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	                       std::span<const uint8_t, 256> disallowRead,
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	                       std::span<const uint8_t, 256> disallowWrite);
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	void invalidateRCache (unsigned start, unsigned size, int ps, int ss,
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	                       std::span<const uint8_t, 256> disallowRead,
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	                       std::span<const uint8_t, 256> disallowWrite);
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	void invalidateWCache (unsigned start, unsigned size, int ps, int ss,
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	                       std::span<const uint8_t, 256> disallowRead,
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	                       std::span<const uint8_t, 256> disallowWrite);
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	/** Fill the read and write cache lines for a specific slot with the
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	 * specified value. Except for the lines where the corresponding
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	 * 'disallow{Read,Write}' array is non-zero, those lines are marked
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	 * non-cacheable.
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	 * This is useful on e.g. a memory mapper bank switch because:
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	 * - Marking the lines 'unknown' (as done by invalidateMemCache) is
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	 *   as much work as directly setting the correct value.
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	 * - Directly setting the correct value saves work later on.
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	 */
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	void fillRWCache(unsigned start, unsigned size, const uint8_t* rData, uint8_t* wData, int ps, int ss,
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	                 std::span<const uint8_t, 256> disallowRead,
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	                 std::span<const uint8_t, 256> disallowWrite);
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	void fillRCache (unsigned start, unsigned size, const uint8_t* rData, int ps, int ss,
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	                 std::span<const uint8_t, 256> disallowRead,
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	                 std::span<const uint8_t, 256> disallowWrite);
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	void fillWCache (unsigned start, unsigned size, uint8_t* wData, int ps, int ss,
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	                 std::span<const uint8_t, 256> disallowRead,
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	                 std::span<const uint8_t, 256> disallowWrite);
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	/** This method raises a maskable interrupt. A device may call this
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	  * method more than once. If the device wants to lower the
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	  * interrupt again it must call the lowerIRQ() method exactly as
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	  * many times.
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	  * Before using this method take a look at IRQHelper. */
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	void raiseIRQ();
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	/** This methods lowers the maskable interrupt again. A device may never
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	  * call this method more often than it called the method
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	  * raiseIRQ().
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	  * Before using this method take a look at IRQHelper. */
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	void lowerIRQ();
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	/** This method raises a non-maskable interrupt. A device may call this
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	  * method more than once. If the device wants to lower the
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	  * interrupt again it must call the lowerNMI() method exactly as
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	  * many times.
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	  * Before using this method take a look at IRQHelper. */
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	void raiseNMI();
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	/** This methods lowers the non-maskable interrupt again. A device may never
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	  * call this method more often than it called the method
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	  * raiseNMI().
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	  * Before using this method take a look at IRQHelper. */
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	void lowerNMI();
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	/** Should only be used from within a MSXDevice::readMem() method.
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	  * Returns true if that read was the first byte of an instruction
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	  * (the Z80 M1 pin is active). This implementation is not 100%
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	  * accurate, but good enough for now.
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	  */
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	[[nodiscard]] bool isM1Cycle(unsigned address) const;
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	/** See CPUCore::exitCPULoopSync() */
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	void exitCPULoopSync();
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	/** See CPUCore::exitCPULoopAsync() */
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	void exitCPULoopAsync();
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	/** Is the R800 currently active? */
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	[[nodiscard]] bool isR800Active() const { return !z80Active; }
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	/** Switch the Z80 clock freq. */
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	void setZ80Freq(unsigned freq);
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	void setInterface(MSXCPUInterface* interface);
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	/** (un)pause CPU. During pause the CPU executes NOP instructions
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	  * continuously (just like during HALT). Used by turbor hw pause. */
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	void setPaused(bool paused);
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	void setNextSyncPoint(EmuTime time);
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	void wait(EmuTime time);
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	EmuTime waitCyclesZ80(EmuTime time, unsigned cycles);
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	EmuTime waitCyclesR800(EmuTime time, unsigned cycles);
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	[[nodiscard]] CPURegs& getRegisters();
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	[[nodiscard]] auto* getZ80() { return z80.get(); }
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	[[nodiscard]] auto* getR800() { return r800.get(); }
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	template<typename Archive>
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	void serialize(Archive& ar, unsigned version);
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private:
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	void invalidateMemCacheSlot();
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	// only for MSXMotherBoard
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	void execute(bool fastForward);
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	friend class MSXMotherBoard;
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	/** The time returned by this method is not safe to use for Scheduler
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	  * or IO related stuff (because it can sometimes already be higher then
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	  * still to be scheduled sync points). Use Scheduler::getCurrentTime()
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	  * instead.
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	  * TODO is this comment still true? */
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	EmuTime getCurrentTime() const;
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	// Observer<Setting>
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	void update(const Setting& setting) noexcept override;
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	template<bool READ, bool WRITE, bool SUB_START>
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	void setRWCache(unsigned start, unsigned size, const uint8_t* rData, uint8_t* wData, int ps, int ss,
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	                std::span<const uint8_t, 256> disallowRead, std::span<const uint8_t, 256> disallowWrite);
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private:
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	MSXMotherBoard& motherboard;
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	TclCallback diHaltCallback;
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	const std::unique_ptr<CPUCore<Z80TYPE>> z80;
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	const std::unique_ptr<CPUCore<R800TYPE>> r800; // can be nullptr
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	std::array<std::array<const uint8_t*, CacheLine::NUM>, 16> slotReadLines;
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	std::array<std::array<      uint8_t*, CacheLine::NUM>, 16> slotWriteLines;
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	std::array<uint8_t, 4> slots; // active slot for page (= 4 * primSlot + secSlot)
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	struct TimeInfoTopic final : InfoTopic {
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		explicit TimeInfoTopic(InfoCommand& machineInfoCommand);
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		void execute(std::span<const TclObject> tokens,
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			     TclObject& result) const override;
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		[[nodiscard]] std::string help(std::span<const TclObject> tokens) const override;
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	} timeInfo;
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	class CPUFreqInfoTopic final : public InfoTopic {
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	public:
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		CPUFreqInfoTopic(InfoCommand& machineInfoCommand,
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				 const std::string& name, CPUClock& clock);
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		void execute(std::span<const TclObject> tokens,
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			     TclObject& result) const override;
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		[[nodiscard]] std::string help(std::span<const TclObject> tokens) const override;
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	private:
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		CPUClock& clock;
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	};
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	CPUFreqInfoTopic                        z80FreqInfo;  // always present
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	const std::unique_ptr<CPUFreqInfoTopic> r800FreqInfo; // can be nullptr
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	struct Debuggable final : SimpleDebuggable {
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		explicit Debuggable(MSXMotherBoard& motherboard);
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		[[nodiscard]] uint8_t read(unsigned address) override;
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		void write(unsigned address, uint8_t value) override;
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	} debuggable;
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	bool z80Active{true};
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	bool newZ80Active{true};
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	MSXCPUInterface* interface{nullptr}; // only used for debug
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};
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SERIALIZE_CLASS_VERSION(MSXCPU, 3);
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} // namespace openmsx
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#endif