OXYGENHUB
◆ main enhanced-x16-emulator / src / extern / ymfm / src / ymfm_opl.cpp
63.9 KiB · C++ · last changed chore(): initial commit 25 days ago source blame history raw
1 
// BSD 3-Clause License
2 
//
3 
// Copyright (c) 2021, Aaron Giles
4 
// All rights reserved.
5 
//
6 
// Redistribution and use in source and binary forms, with or without
7 
// modification, are permitted provided that the following conditions are met:
8 
//
9 
// 1. Redistributions of source code must retain the above copyright notice, this
10 
//    list of conditions and the following disclaimer.
11 
//
12 
// 2. Redistributions in binary form must reproduce the above copyright notice,
13 
//    this list of conditions and the following disclaimer in the documentation
14 
//    and/or other materials provided with the distribution.
15 
//
16 
// 3. Neither the name of the copyright holder nor the names of its
17 
//    contributors may be used to endorse or promote products derived from
18 
//    this software without specific prior written permission.
19 
//
20 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 
// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 
// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30
31 
#include "ymfm_opl.h"
32 
#include "ymfm_fm.ipp"
33
34 
namespace ymfm
35 
{
36
37 
//-------------------------------------------------
38 
//  opl_key_scale_atten - converts an
39 
//  OPL concatenated block (3 bits) and fnum
40 
//  (10 bits) into an attenuation offset; values
41 
//  here are for 6dB/octave, in 0.75dB units
42 
//  (matching total level LSB)
43 
//-------------------------------------------------
44
45 
inline uint32_t opl_key_scale_atten(uint32_t block, uint32_t fnum_4msb)
46 
{
47 
	// this table uses the top 4 bits of FNUM and are the maximal values
48 
	// (for when block == 7). Values for other blocks can be computed by
49 
	// subtracting 8 for each block below 7.
50 
	static uint8_t const fnum_to_atten[16] = { 0,24,32,37,40,43,45,47,48,50,51,52,53,54,55,56 };
51 
	int32_t result = fnum_to_atten[fnum_4msb] - 8 * (block ^ 7);
52 
	return std::max<int32_t>(0, result);
53 
}
54
55
56 
//*********************************************************
57 
//  OPL REGISTERS
58 
//*********************************************************
59
60 
//-------------------------------------------------
61 
//  opl_registers_base - constructor
62 
//-------------------------------------------------
63
64 
template<int Revision>
65 
opl_registers_base<Revision>::opl_registers_base() :
66 
	m_lfo_am_counter(0),
67 
	m_lfo_pm_counter(0),
68 
	m_noise_lfsr(1),
69 
	m_lfo_am(0)
70 
{
71 
	// create these pointers to appease overzealous compilers checking array
72 
	// bounds in unreachable code (looking at you, clang)
73 
	uint16_t *wf0 = &m_waveform[0][0];
74 
	uint16_t *wf1 = &m_waveform[1 % WAVEFORMS][0];
75 
	uint16_t *wf2 = &m_waveform[2 % WAVEFORMS][0];
76 
	uint16_t *wf3 = &m_waveform[3 % WAVEFORMS][0];
77 
	uint16_t *wf4 = &m_waveform[4 % WAVEFORMS][0];
78 
	uint16_t *wf5 = &m_waveform[5 % WAVEFORMS][0];
79 
	uint16_t *wf6 = &m_waveform[6 % WAVEFORMS][0];
80 
	uint16_t *wf7 = &m_waveform[7 % WAVEFORMS][0];
81
82 
	// create the waveforms
83 
	for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++)
84 
		wf0[index] = abs_sin_attenuation(index) | (bitfield(index, 9) << 15);
85
86 
	if (WAVEFORMS >= 4)
87 
	{
88 
		uint16_t zeroval = wf0[0];
89 
		for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++)
90 
		{
91 
			wf1[index] = bitfield(index, 9) ? zeroval : wf0[index];
92 
			wf2[index] = wf0[index] & 0x7fff;
93 
			wf3[index] = bitfield(index, 8) ? zeroval : (wf0[index] & 0x7fff);
94 
			if (WAVEFORMS >= 8)
95 
			{
96 
				wf4[index] = bitfield(index, 9) ? zeroval : wf0[index * 2];
97 
				wf5[index] = bitfield(index, 9) ? zeroval : wf0[(index * 2) & 0x1ff];
98 
				wf6[index] = bitfield(index, 9) << 15;
99 
				wf7[index] = (bitfield(index, 9) ? (index ^ 0x13ff) : index) << 3;
100 
			}
101 
		}
102 
	}
103
104 
	// OPL3/OPL4 have dynamic operators, so initialize the fourop_enable value here
105 
	// since operator_map() is called right away, prior to reset()
106 
	if (Revision > 2)
107 
		m_regdata[0x104 % REGISTERS] = 0;
108 
}
109
110
111 
//-------------------------------------------------
112 
//  reset - reset to initial state
113 
//-------------------------------------------------
114
115 
template<int Revision>
116 
void opl_registers_base<Revision>::reset()
117 
{
118 
	std::fill_n(&m_regdata[0], REGISTERS, 0);
119 
}
120
121
122 
//-------------------------------------------------
123 
//  save_restore - save or restore the data
124 
//-------------------------------------------------
125
126 
template<int Revision>
127 
void opl_registers_base<Revision>::save_restore(ymfm_saved_state &state)
128 
{
129 
	state.save_restore(m_lfo_am_counter);
130 
	state.save_restore(m_lfo_pm_counter);
131 
	state.save_restore(m_lfo_am);
132 
	state.save_restore(m_noise_lfsr);
133 
	state.save_restore(m_regdata);
134 
}
135
136
137 
//-------------------------------------------------
138 
//  operator_map - return an array of operator
139 
//  indices for each channel; for OPL this is fixed
140 
//-------------------------------------------------
141
142 
template<int Revision>
143 
void opl_registers_base<Revision>::operator_map(operator_mapping &dest) const
144 
{
145 
	if (Revision <= 2)
146 
	{
147 
		// OPL/OPL2 has a fixed map, all 2 operators
148 
		static const operator_mapping s_fixed_map =
149 
		{ {
150 
			operator_list(  0,  3 ),  // Channel 0 operators
151 
			operator_list(  1,  4 ),  // Channel 1 operators
152 
			operator_list(  2,  5 ),  // Channel 2 operators
153 
			operator_list(  6,  9 ),  // Channel 3 operators
154 
			operator_list(  7, 10 ),  // Channel 4 operators
155 
			operator_list(  8, 11 ),  // Channel 5 operators
156 
			operator_list( 12, 15 ),  // Channel 6 operators
157 
			operator_list( 13, 16 ),  // Channel 7 operators
158 
			operator_list( 14, 17 ),  // Channel 8 operators
159 
		} };
160 
		dest = s_fixed_map;
161 
	}
162 
	else
163 
	{
164 
		// OPL3/OPL4 can be configured for 2 or 4 operators
165 
		uint32_t fourop = fourop_enable();
166
167 
		dest.chan[ 0] = bitfield(fourop, 0) ? operator_list(  0,  3,  6,  9 ) : operator_list(  0,  3 );
168 
		dest.chan[ 1] = bitfield(fourop, 1) ? operator_list(  1,  4,  7, 10 ) : operator_list(  1,  4 );
169 
		dest.chan[ 2] = bitfield(fourop, 2) ? operator_list(  2,  5,  8, 11 ) : operator_list(  2,  5 );
170 
		dest.chan[ 3] = bitfield(fourop, 0) ? operator_list() : operator_list(  6,  9 );
171 
		dest.chan[ 4] = bitfield(fourop, 1) ? operator_list() : operator_list(  7, 10 );
172 
		dest.chan[ 5] = bitfield(fourop, 2) ? operator_list() : operator_list(  8, 11 );
173 
		dest.chan[ 6] = operator_list( 12, 15 );
174 
		dest.chan[ 7] = operator_list( 13, 16 );
175 
		dest.chan[ 8] = operator_list( 14, 17 );
176
177 
		dest.chan[ 9] = bitfield(fourop, 3) ? operator_list( 18, 21, 24, 27 ) : operator_list( 18, 21 );
178 
		dest.chan[10] = bitfield(fourop, 4) ? operator_list( 19, 22, 25, 28 ) : operator_list( 19, 22 );
179 
		dest.chan[11] = bitfield(fourop, 5) ? operator_list( 20, 23, 26, 29 ) : operator_list( 20, 23 );
180 
		dest.chan[12] = bitfield(fourop, 3) ? operator_list() : operator_list( 24, 27 );
181 
		dest.chan[13] = bitfield(fourop, 4) ? operator_list() : operator_list( 25, 28 );
182 
		dest.chan[14] = bitfield(fourop, 5) ? operator_list() : operator_list( 26, 29 );
183 
		dest.chan[15] = operator_list( 30, 33 );
184 
		dest.chan[16] = operator_list( 31, 34 );
185 
		dest.chan[17] = operator_list( 32, 35 );
186 
	}
187 
}
188
189
190 
//-------------------------------------------------
191 
//  write - handle writes to the register array
192 
//-------------------------------------------------
193
194 
template<int Revision>
195 
bool opl_registers_base<Revision>::write(uint16_t index, uint8_t data, uint32_t &channel, uint32_t &opmask)
196 
{
197 
	assert(index < REGISTERS);
198
199 
	// writes to the mode register with high bit set ignore the low bits
200 
	if (index == REG_MODE && bitfield(data, 7) != 0)
201 
		m_regdata[index] |= 0x80;
202 
	else
203 
		m_regdata[index] = data;
204
205 
	// handle writes to the rhythm keyons
206 
	if (index == 0xbd)
207 
	{
208 
		channel = RHYTHM_CHANNEL;
209 
		opmask = bitfield(data, 5) ? bitfield(data, 0, 5) : 0;
210 
		return true;
211 
	}
212
213 
	// handle writes to the channel keyons
214 
	if ((index & 0xf0) == 0xb0)
215 
	{
216 
		channel = index & 0x0f;
217 
		if (channel < 9)
218 
		{
219 
			if (IsOpl3Plus)
220 
				channel += 9 * bitfield(index, 8);
221 
			opmask = bitfield(data, 5) ? 15 : 0;
222 
			return true;
223 
		}
224 
	}
225 
	return false;
226 
}
227
228
229 
//-------------------------------------------------
230 
//  clock_noise_and_lfo - clock the noise and LFO,
231 
//  handling clock division, depth, and waveform
232 
//  computations
233 
//-------------------------------------------------
234
235 
static int32_t opl_clock_noise_and_lfo(uint32_t &noise_lfsr, uint16_t &lfo_am_counter, uint16_t &lfo_pm_counter, uint8_t &lfo_am, uint32_t am_depth, uint32_t pm_depth)
236 
{
237 
	// OPL has a 23-bit noise generator for the rhythm section, running at
238 
	// a constant rate, used only for percussion input
239 
	noise_lfsr <<= 1;
240 
	noise_lfsr |= bitfield(noise_lfsr, 23) ^ bitfield(noise_lfsr, 9) ^ bitfield(noise_lfsr, 8) ^ bitfield(noise_lfsr, 1);
241
242 
	// OPL has two fixed-frequency LFOs, one for AM, one for PM
243
244 
	// the AM LFO has 210*64 steps; at a nominal 50kHz output,
245 
	// this equates to a period of 50000/(210*64) = 3.72Hz
246 
	uint32_t am_counter = lfo_am_counter++;
247 
	if (am_counter >= 210*64 - 1)
248 
		lfo_am_counter = 0;
249
250 
	// low 8 bits are fractional; depth 0 is divided by 2, while depth 1 is times 2
251 
	int shift = 9 - 2 * am_depth;
252
253 
	// AM value is the upper bits of the value, inverted across the midpoint
254 
	// to produce a triangle
255 
	lfo_am = ((am_counter < 105*64) ? am_counter : (210*64+63 - am_counter)) >> shift;
256
257 
	// the PM LFO has 8192 steps, or a nominal period of 6.1Hz
258 
	uint32_t pm_counter = lfo_pm_counter++;
259
260 
	// PM LFO is broken into 8 chunks, each lasting 1024 steps; the PM value
261 
	// depends on the upper bits of FNUM, so this value is a fraction and
262 
	// sign to apply to that value, as a 1.3 value
263 
	static int8_t const pm_scale[8] = { 8, 4, 0, -4, -8, -4, 0, 4 };
264 
	return pm_scale[bitfield(pm_counter, 10, 3)] >> (pm_depth ^ 1);
265 
}
266
267 
template<int Revision>
268 
int32_t opl_registers_base<Revision>::clock_noise_and_lfo()
269 
{
270 
	return opl_clock_noise_and_lfo(m_noise_lfsr, m_lfo_am_counter, m_lfo_pm_counter, m_lfo_am, lfo_am_depth(), lfo_pm_depth());
271 
}
272
273
274 
//-------------------------------------------------
275 
//  cache_operator_data - fill the operator cache
276 
//  with prefetched data; note that this code is
277 
//  also used by ymopna_registers, so it must
278 
//  handle upper channels cleanly
279 
//-------------------------------------------------
280
281 
template<int Revision>
282 
void opl_registers_base<Revision>::cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache)
283 
{
284 
	// set up the easy stuff
285 
	cache.waveform = &m_waveform[op_waveform(opoffs) % WAVEFORMS][0];
286
287 
	// get frequency from the channel
288 
	uint32_t block_freq = cache.block_freq = ch_block_freq(choffs);
289
290 
	// compute the keycode: block_freq is:
291 
	//
292 
	//     111  |
293 
	//     21098|76543210
294 
	//     BBBFF|FFFFFFFF
295 
	//     ^^^??
296 
	//
297 
	// the 4-bit keycode uses the top 3 bits plus one of the next two bits
298 
	uint32_t keycode = bitfield(block_freq, 10, 3) << 1;
299
300 
	// lowest bit is determined by note_select(); note that it is
301 
	// actually reversed from what the manual says, however
302 
	keycode |= bitfield(block_freq, 9 - note_select(), 1);
303
304 
	// no detune adjustment on OPL
305 
	cache.detune = 0;
306
307 
	// multiple value, as an x.1 value (0 means 0.5)
308 
	// replace the low bit with a table lookup to give 0,1,2,3,4,5,6,7,8,9,10,10,12,12,15,15
309 
	uint32_t multiple = op_multiple(opoffs);
310 
	cache.multiple = ((multiple & 0xe) | bitfield(0xc2aa, multiple)) * 2;
311 
	if (cache.multiple == 0)
312 
		cache.multiple = 1;
313
314 
	// phase step, or PHASE_STEP_DYNAMIC if PM is active; this depends on block_freq, detune,
315 
	// and multiple, so compute it after we've done those
316 
	if (op_lfo_pm_enable(opoffs) == 0)
317 
		cache.phase_step = compute_phase_step(choffs, opoffs, cache, 0);
318 
	else
319 
		cache.phase_step = opdata_cache::PHASE_STEP_DYNAMIC;
320
321 
	// total level, scaled by 8
322 
	cache.total_level = op_total_level(opoffs) << 3;
323
324 
	// pre-add key scale level
325 
	uint32_t ksl = op_ksl(opoffs);
326 
	if (ksl != 0)
327 
		cache.total_level += opl_key_scale_atten(bitfield(block_freq, 10, 3), bitfield(block_freq, 6, 4)) << ksl;
328
329 
	// 4-bit sustain level, but 15 means 31 so effectively 5 bits
330 
	cache.eg_sustain = op_sustain_level(opoffs);
331 
	cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10;
332 
	cache.eg_sustain <<= 5;
333
334 
	// determine KSR adjustment for enevlope rates
335 
	uint32_t ksrval = keycode >> (2 * (op_ksr(opoffs) ^ 1));
336 
	cache.eg_rate[EG_ATTACK] = effective_rate(op_attack_rate(opoffs) * 4, ksrval);
337 
	cache.eg_rate[EG_DECAY] = effective_rate(op_decay_rate(opoffs) * 4, ksrval);
338 
	cache.eg_rate[EG_SUSTAIN] = op_eg_sustain(opoffs) ? 0 : effective_rate(op_release_rate(opoffs) * 4, ksrval);
339 
	cache.eg_rate[EG_RELEASE] = effective_rate(op_release_rate(opoffs) * 4, ksrval);
340 
	cache.eg_rate[EG_DEPRESS] = 0x3f;
341 
}
342
343
344 
//-------------------------------------------------
345 
//  compute_phase_step - compute the phase step
346 
//-------------------------------------------------
347
348 
static uint32_t opl_compute_phase_step(uint32_t block_freq, uint32_t multiple, int32_t lfo_raw_pm)
349 
{
350 
	// OPL phase calculation has no detuning, but uses FNUMs like
351 
	// the OPN version, and computes PM a bit differently
352
353 
	// extract frequency number as a 12-bit fraction
354 
	uint32_t fnum = bitfield(block_freq, 0, 10) << 2;
355
356 
	// apply the phase adjustment based on the upper 3 bits
357 
	// of FNUM and the PM depth parameters
358 
	fnum += (lfo_raw_pm * bitfield(block_freq, 7, 3)) >> 1;
359
360 
	// keep fnum to 12 bits
361 
	fnum &= 0xfff;
362
363 
	// apply block shift to compute phase step
364 
	uint32_t block = bitfield(block_freq, 10, 3);
365 
	uint32_t phase_step = (fnum << block) >> 2;
366
367 
	// apply frequency multiplier (which is cached as an x.1 value)
368 
	return (phase_step * multiple) >> 1;
369 
}
370
371 
template<int Revision>
372 
uint32_t opl_registers_base<Revision>::compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm)
373 
{
374 
	return opl_compute_phase_step(cache.block_freq, cache.multiple, op_lfo_pm_enable(opoffs) ? lfo_raw_pm : 0);
375 
}
376
377
378 
//-------------------------------------------------
379 
//  log_keyon - log a key-on event
380 
//-------------------------------------------------
381
382 
template<int Revision>
383 
std::string opl_registers_base<Revision>::log_keyon(uint32_t choffs, uint32_t opoffs)
384 
{
385 
	uint32_t chnum = (choffs & 15) + 9 * bitfield(choffs, 8);
386 
	uint32_t opnum = (opoffs & 31) - 2 * ((opoffs & 31) / 8) + 18 * bitfield(opoffs, 8);
387
388 
	char buffer[256];
389 
	int end = 0;
390
391 
	end += snprintf(&buffer[end], sizeof(buffer) - end, "%2u.%02u freq=%04X fb=%u alg=%X mul=%X tl=%02X ksr=%u ns=%u ksl=%u adr=%X/%X/%X sl=%X sus=%u",
392 
		chnum, opnum,
393 
		ch_block_freq(choffs),
394 
		ch_feedback(choffs),
395 
		ch_algorithm(choffs),
396 
		op_multiple(opoffs),
397 
		op_total_level(opoffs),
398 
		op_ksr(opoffs),
399 
		note_select(),
400 
		op_ksl(opoffs),
401 
		op_attack_rate(opoffs),
402 
		op_decay_rate(opoffs),
403 
		op_release_rate(opoffs),
404 
		op_sustain_level(opoffs),
405 
		op_eg_sustain(opoffs));
406
407 
	if (OUTPUTS > 1)
408 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " out=%c%c%c%c",
409 
			ch_output_0(choffs) ? 'L' : '-',
410 
			ch_output_1(choffs) ? 'R' : '-',
411 
			ch_output_2(choffs) ? '0' : '-',
412 
			ch_output_3(choffs) ? '1' : '-');
413 
	if (op_lfo_am_enable(opoffs) != 0)
414 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " am=%u", lfo_am_depth());
415 
	if (op_lfo_pm_enable(opoffs) != 0)
416 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " pm=%u", lfo_pm_depth());
417 
	if (waveform_enable() && op_waveform(opoffs) != 0)
418 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " wf=%u", op_waveform(opoffs));
419 
	if (is_rhythm(choffs))
420 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " rhy=1");
421 
	if (DYNAMIC_OPS)
422 
	{
423 
		operator_mapping map;
424 
		operator_map(map);
425 
		if (bitfield(map.chan[chnum], 16, 8) != 0xff)
426 
			end += snprintf(&buffer[end], sizeof(buffer) - end, " 4op");
427 
	}
428
429 
	return buffer;
430 
}
431
432
433 
//*********************************************************
434 
//  OPLL SPECIFICS
435 
//*********************************************************
436
437 
//-------------------------------------------------
438 
//  opll_registers - constructor
439 
//-------------------------------------------------
440
441 
opll_registers::opll_registers() :
442 
	m_lfo_am_counter(0),
443 
	m_lfo_pm_counter(0),
444 
	m_noise_lfsr(1),
445 
	m_lfo_am(0)
446 
{
447 
	// create the waveforms
448 
	for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++)
449 
		m_waveform[0][index] = abs_sin_attenuation(index) | (bitfield(index, 9) << 15);
450
451 
	uint16_t zeroval = m_waveform[0][0];
452 
	for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++)
453 
		m_waveform[1][index] = bitfield(index, 9) ? zeroval : m_waveform[0][index];
454
455 
	// initialize the instruments to something sane
456 
	for (uint32_t choffs = 0; choffs < CHANNELS; choffs++)
457 
		m_chinst[choffs] = &m_regdata[0];
458 
	for (uint32_t opoffs = 0; opoffs < OPERATORS; opoffs++)
459 
		m_opinst[opoffs] = &m_regdata[bitfield(opoffs, 0)];
460 
}
461
462
463 
//-------------------------------------------------
464 
//  reset - reset to initial state
465 
//-------------------------------------------------
466
467 
void opll_registers::reset()
468 
{
469 
	std::fill_n(&m_regdata[0], REGISTERS, 0);
470 
}
471
472
473 
//-------------------------------------------------
474 
//  save_restore - save or restore the data
475 
//-------------------------------------------------
476
477 
void opll_registers::save_restore(ymfm_saved_state &state)
478 
{
479 
	state.save_restore(m_lfo_am_counter);
480 
	state.save_restore(m_lfo_pm_counter);
481 
	state.save_restore(m_lfo_am);
482 
	state.save_restore(m_noise_lfsr);
483 
	state.save_restore(m_regdata);
484 
}
485
486
487 
//-------------------------------------------------
488 
//  operator_map - return an array of operator
489 
//  indices for each channel; for OPLL this is fixed
490 
//-------------------------------------------------
491
492 
void opll_registers::operator_map(operator_mapping &dest) const
493 
{
494 
	static const operator_mapping s_fixed_map =
495 
	{ {
496 
		operator_list(  0,  1 ),  // Channel 0 operators
497 
		operator_list(  2,  3 ),  // Channel 1 operators
498 
		operator_list(  4,  5 ),  // Channel 2 operators
499 
		operator_list(  6,  7 ),  // Channel 3 operators
500 
		operator_list(  8,  9 ),  // Channel 4 operators
501 
		operator_list( 10, 11 ),  // Channel 5 operators
502 
		operator_list( 12, 13 ),  // Channel 6 operators
503 
		operator_list( 14, 15 ),  // Channel 7 operators
504 
		operator_list( 16, 17 ),  // Channel 8 operators
505 
	} };
506 
	dest = s_fixed_map;
507 
}
508
509
510 
//-------------------------------------------------
511 
//  write - handle writes to the register array;
512 
//  note that this code is also used by
513 
//  ymopl3_registers, so it must handle upper
514 
//  channels cleanly
515 
//-------------------------------------------------
516
517 
bool opll_registers::write(uint16_t index, uint8_t data, uint32_t &channel, uint32_t &opmask)
518 
{
519 
	// unclear the address is masked down to 6 bits or if writes above
520 
	// the register top are ignored; assuming the latter for now
521 
	if (index >= REGISTERS)
522 
		return false;
523
524 
	// write the new data
525 
	m_regdata[index] = data;
526
527 
	// handle writes to the rhythm keyons
528 
	if (index == 0x0e)
529 
	{
530 
		channel = RHYTHM_CHANNEL;
531 
		opmask = bitfield(data, 5) ? bitfield(data, 0, 5) : 0;
532 
		return true;
533 
	}
534
535 
	// handle writes to the channel keyons
536 
	if ((index & 0xf0) == 0x20)
537 
	{
538 
		channel = index & 0x0f;
539 
		if (channel < CHANNELS)
540 
		{
541 
			opmask = bitfield(data, 4) ? 3 : 0;
542 
			return true;
543 
		}
544 
	}
545 
	return false;
546 
}
547
548
549 
//-------------------------------------------------
550 
//  clock_noise_and_lfo - clock the noise and LFO,
551 
//  handling clock division, depth, and waveform
552 
//  computations
553 
//-------------------------------------------------
554
555 
int32_t opll_registers::clock_noise_and_lfo()
556 
{
557 
	// implementation is the same as OPL with fixed depths
558 
	return opl_clock_noise_and_lfo(m_noise_lfsr, m_lfo_am_counter, m_lfo_pm_counter, m_lfo_am, 1, 1);
559 
}
560
561
562 
//-------------------------------------------------
563 
//  cache_operator_data - fill the operator cache
564 
//  with prefetched data; note that this code is
565 
//  also used by ymopna_registers, so it must
566 
//  handle upper channels cleanly
567 
//-------------------------------------------------
568
569 
void opll_registers::cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache)
570 
{
571 
	// first set up the instrument data
572 
	uint32_t instrument = ch_instrument(choffs);
573 
	if (rhythm_enable() && choffs >= 6)
574 
		m_chinst[choffs] = &m_instdata[8 * (15 + (choffs - 6))];
575 
	else
576 
		m_chinst[choffs] = (instrument == 0) ? &m_regdata[0] : &m_instdata[8 * (instrument - 1)];
577 
	m_opinst[opoffs] = m_chinst[choffs] + bitfield(opoffs, 0);
578
579 
	// set up the easy stuff
580 
	cache.waveform = &m_waveform[op_waveform(opoffs) % WAVEFORMS][0];
581
582 
	// get frequency from the channel
583 
	uint32_t block_freq = cache.block_freq = ch_block_freq(choffs);
584
585 
	// compute the keycode: block_freq is:
586 
	//
587 
	//     11  |
588 
	//     1098|76543210
589 
	//     BBBF|FFFFFFFF
590 
	//     ^^^^
591 
	//
592 
	// the 4-bit keycode uses the top 4 bits
593 
	uint32_t keycode = bitfield(block_freq, 8, 4);
594
595 
	// no detune adjustment on OPLL
596 
	cache.detune = 0;
597
598 
	// multiple value, as an x.1 value (0 means 0.5)
599 
	// replace the low bit with a table lookup to give 0,1,2,3,4,5,6,7,8,9,10,10,12,12,15,15
600 
	uint32_t multiple = op_multiple(opoffs);
601 
	cache.multiple = ((multiple & 0xe) | bitfield(0xc2aa, multiple)) * 2;
602 
	if (cache.multiple == 0)
603 
		cache.multiple = 1;
604
605 
	// phase step, or PHASE_STEP_DYNAMIC if PM is active; this depends on
606 
	// block_freq, detune, and multiple, so compute it after we've done those
607 
	if (op_lfo_pm_enable(opoffs) == 0)
608 
		cache.phase_step = compute_phase_step(choffs, opoffs, cache, 0);
609 
	else
610 
		cache.phase_step = opdata_cache::PHASE_STEP_DYNAMIC;
611
612 
	// total level, scaled by 8; for non-rhythm operator 0, this is the total
613 
	// level from the instrument data; for other operators it is 4*volume
614 
	if (bitfield(opoffs, 0) == 1 || (rhythm_enable() && choffs >= 7))
615 
		cache.total_level = op_volume(opoffs) * 4;
616 
	else
617 
		cache.total_level = ch_total_level(choffs);
618 
	cache.total_level <<= 3;
619
620 
	// pre-add key scale level
621 
	uint32_t ksl = op_ksl(opoffs);
622 
	if (ksl != 0)
623 
		cache.total_level += opl_key_scale_atten(bitfield(block_freq, 9, 3), bitfield(block_freq, 5, 4)) << ksl;
624
625 
	// 4-bit sustain level, but 15 means 31 so effectively 5 bits
626 
	cache.eg_sustain = op_sustain_level(opoffs);
627 
	cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10;
628 
	cache.eg_sustain <<= 5;
629
630 
	// The envelope diagram in the YM2413 datasheet gives values for these
631 
	// in ms from 0->48dB. The attack/decay tables give values in ms from
632 
	// 0->96dB, so to pick an equivalent decay rate, we want to find the
633 
	// closest match that is 2x the 0->48dB value:
634 
	//
635 
	//     DP =   10ms (0->48db) ->   20ms (0->96db); decay of 12 gives   19.20ms
636 
	//     RR =  310ms (0->48db) ->  620ms (0->96db); decay of  7 gives  613.76ms
637 
	//     RS = 1200ms (0->48db) -> 2400ms (0->96db); decay of  5 gives 2455.04ms
638 
	//
639 
	// The envelope diagram for percussive sounds (eg_sustain() == 0) also uses
640 
	// "RR" to mean both the constant RR above and the Release Rate specified in
641 
	// the instrument data. In this case, Relief Pitcher's credit sound bears out
642 
	// that the Release Rate is used during sustain, and that the constant RR
643 
	// (or RS) is used during the release phase.
644 
	constexpr uint8_t DP = 12 * 4;
645 
	constexpr uint8_t RR = 7 * 4;
646 
	constexpr uint8_t RS = 5 * 4;
647
648 
	// determine KSR adjustment for envelope rates
649 
	uint32_t ksrval = keycode >> (2 * (op_ksr(opoffs) ^ 1));
650 
	cache.eg_rate[EG_DEPRESS] = DP;
651 
	cache.eg_rate[EG_ATTACK] = effective_rate(op_attack_rate(opoffs) * 4, ksrval);
652 
	cache.eg_rate[EG_DECAY] = effective_rate(op_decay_rate(opoffs) * 4, ksrval);
653 
	if (op_eg_sustain(opoffs))
654 
	{
655 
		cache.eg_rate[EG_SUSTAIN] = 0;
656 
		cache.eg_rate[EG_RELEASE] = ch_sustain(choffs) ? RS : effective_rate(op_release_rate(opoffs) * 4, ksrval);
657 
	}
658 
	else
659 
	{
660 
		cache.eg_rate[EG_SUSTAIN] = effective_rate(op_release_rate(opoffs) * 4, ksrval);
661 
		cache.eg_rate[EG_RELEASE] = ch_sustain(choffs) ? RS : RR;
662 
	}
663 
}
664
665
666 
//-------------------------------------------------
667 
//  compute_phase_step - compute the phase step
668 
//-------------------------------------------------
669
670 
uint32_t opll_registers::compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm)
671 
{
672 
	// phase step computation is the same as OPL but the block_freq has one
673 
	// more bit, which we shift in
674 
	return opl_compute_phase_step(cache.block_freq << 1, cache.multiple, op_lfo_pm_enable(opoffs) ? lfo_raw_pm : 0);
675 
}
676
677
678 
//-------------------------------------------------
679 
//  log_keyon - log a key-on event
680 
//-------------------------------------------------
681
682 
std::string opll_registers::log_keyon(uint32_t choffs, uint32_t opoffs)
683 
{
684 
	uint32_t chnum = choffs;
685 
	uint32_t opnum = opoffs;
686
687 
	char buffer[256];
688 
	int end = 0;
689
690 
	end += snprintf(&buffer[end], sizeof(buffer) - end, "%u.%02u freq=%04X inst=%X fb=%u mul=%X",
691 
		chnum, opnum,
692 
		ch_block_freq(choffs),
693 
		ch_instrument(choffs),
694 
		ch_feedback(choffs),
695 
		op_multiple(opoffs));
696
697 
	if (bitfield(opoffs, 0) == 1 || (is_rhythm(choffs) && choffs >= 6))
698 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " vol=%X", op_volume(opoffs));
699 
	else
700 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " tl=%02X", ch_total_level(choffs));
701
702 
	end += snprintf(&buffer[end], sizeof(buffer) - end, " ksr=%u ksl=%u adr=%X/%X/%X sl=%X sus=%u/%u",
703 
		op_ksr(opoffs),
704 
		op_ksl(opoffs),
705 
		op_attack_rate(opoffs),
706 
		op_decay_rate(opoffs),
707 
		op_release_rate(opoffs),
708 
		op_sustain_level(opoffs),
709 
		op_eg_sustain(opoffs),
710 
		ch_sustain(choffs));
711
712 
	if (op_lfo_am_enable(opoffs))
713 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " am=1");
714 
	if (op_lfo_pm_enable(opoffs))
715 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " pm=1");
716 
	if (op_waveform(opoffs) != 0)
717 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " wf=1");
718 
	if (is_rhythm(choffs))
719 
		end += snprintf(&buffer[end], sizeof(buffer) - end, " rhy=1");
720
721 
	return buffer;
722 
}
723
724
725
726 
//*********************************************************
727 
//  YM3526
728 
//*********************************************************
729
730 
//-------------------------------------------------
731 
//  ym3526 - constructor
732 
//-------------------------------------------------
733
734 
ym3526::ym3526(ymfm_interface &intf) :
735 
	m_address(0),
736 
	m_fm(intf)
737 
{
738 
}
739
740
741 
//-------------------------------------------------
742 
//  reset - reset the system
743 
//-------------------------------------------------
744
745 
void ym3526::reset()
746 
{
747 
	// reset the engines
748 
	m_fm.reset();
749 
}
750
751
752 
//-------------------------------------------------
753 
//  save_restore - save or restore the data
754 
//-------------------------------------------------
755
756 
void ym3526::save_restore(ymfm_saved_state &state)
757 
{
758 
	state.save_restore(m_address);
759 
	m_fm.save_restore(state);
760 
}
761
762
763 
//-------------------------------------------------
764 
//  read_status - read the status register
765 
//-------------------------------------------------
766
767 
uint8_t ym3526::read_status()
768 
{
769 
	return m_fm.status() | 0x06;
770 
}
771
772
773 
//-------------------------------------------------
774 
//  read - handle a read from the device
775 
//-------------------------------------------------
776
777 
uint8_t ym3526::read(uint32_t offset)
778 
{
779 
	uint8_t result = 0xff;
780 
	switch (offset & 1)
781 
	{
782 
		case 0: // status port
783 
			result = read_status();
784 
			break;
785
786 
		case 1: // when A0=1 datasheet says "the data on the bus are not guaranteed"
787 
			break;
788 
	}
789 
	return result;
790 
}
791
792
793 
//-------------------------------------------------
794 
//  write_address - handle a write to the address
795 
//  register
796 
//-------------------------------------------------
797
798 
void ym3526::write_address(uint8_t data)
799 
{
800 
	// YM3526 doesn't expose a busy signal, and the datasheets don't indicate
801 
	// delays, but all other OPL chips need 12 cycles for address writes
802 
	m_fm.intf().ymfm_set_busy_end(12 * m_fm.clock_prescale());
803
804 
	// just set the address
805 
	m_address = data;
806 
}
807
808
809 
//-------------------------------------------------
810 
//  write - handle a write to the register
811 
//  interface
812 
//-------------------------------------------------
813
814 
void ym3526::write_data(uint8_t data)
815 
{
816 
	// YM3526 doesn't expose a busy signal, and the datasheets don't indicate
817 
	// delays, but all other OPL chips need 84 cycles for data writes
818 
	m_fm.intf().ymfm_set_busy_end(84 * m_fm.clock_prescale());
819
820 
	// write to FM
821 
	m_fm.write(m_address, data);
822 
}
823
824
825 
//-------------------------------------------------
826 
//  write - handle a write to the register
827 
//  interface
828 
//-------------------------------------------------
829
830 
void ym3526::write(uint32_t offset, uint8_t data)
831 
{
832 
	switch (offset & 1)
833 
	{
834 
		case 0: // address port
835 
			write_address(data);
836 
			break;
837
838 
		case 1: // data port
839 
			write_data(data);
840 
			break;
841 
	}
842 
}
843
844
845 
//-------------------------------------------------
846 
//  generate - generate samples of sound
847 
//-------------------------------------------------
848
849 
void ym3526::generate(output_data *output, uint32_t numsamples)
850 
{
851 
	for (uint32_t samp = 0; samp < numsamples; samp++, output++)
852 
	{
853 
		// clock the system
854 
		m_fm.clock(fm_engine::ALL_CHANNELS);
855
856 
		// update the FM content; mixing details for YM3526 need verification
857 
		m_fm.output(output->clear(), 1, 32767, fm_engine::ALL_CHANNELS);
858
859 
		// YM3526 uses an external DAC (YM3014) with mantissa/exponent format
860 
		// convert to 10.3 floating point value and back to simulate truncation
861 
		output->roundtrip_fp();
862 
	}
863 
}
864
865
866
867 
//*********************************************************
868 
//  Y8950
869 
//*********************************************************
870
871 
//-------------------------------------------------
872 
//  y8950 - constructor
873 
//-------------------------------------------------
874
875 
y8950::y8950(ymfm_interface &intf) :
876 
	m_address(0),
877 
	m_io_ddr(0),
878 
	m_fm(intf),
879 
	m_adpcm_b(intf)
880 
{
881 
}
882
883
884 
//-------------------------------------------------
885 
//  reset - reset the system
886 
//-------------------------------------------------
887
888 
void y8950::reset()
889 
{
890 
	// reset the engines
891 
	m_fm.reset();
892 
	m_adpcm_b.reset();
893 
}
894
895
896 
//-------------------------------------------------
897 
//  save_restore - save or restore the data
898 
//-------------------------------------------------
899
900 
void y8950::save_restore(ymfm_saved_state &state)
901 
{
902 
	state.save_restore(m_address);
903 
	state.save_restore(m_io_ddr);
904 
	m_fm.save_restore(state);
905 
}
906
907
908 
//-------------------------------------------------
909 
//  read_status - read the status register
910 
//-------------------------------------------------
911
912 
uint8_t y8950::read_status()
913 
{
914 
	// start with current FM status, masking out bits we might set
915 
	uint8_t status = m_fm.status() & ~(STATUS_ADPCM_B_EOS | STATUS_ADPCM_B_BRDY | STATUS_ADPCM_B_PLAYING);
916
917 
	// insert the live ADPCM status bits
918 
	uint8_t adpcm_status = m_adpcm_b.status();
919 
	if ((adpcm_status & adpcm_b_channel::STATUS_EOS) != 0)
920 
		status |= STATUS_ADPCM_B_EOS;
921 
	if ((adpcm_status & adpcm_b_channel::STATUS_BRDY) != 0)
922 
		status |= STATUS_ADPCM_B_BRDY;
923 
	if ((adpcm_status & adpcm_b_channel::STATUS_PLAYING) != 0)
924 
		status |= STATUS_ADPCM_B_PLAYING;
925
926 
	// run it through the FM engine to handle interrupts for us
927 
	return m_fm.set_reset_status(status, ~status);
928 
}
929
930
931 
//-------------------------------------------------
932 
//  read_data - read the data port
933 
//-------------------------------------------------
934
935 
uint8_t y8950::read_data()
936 
{
937 
	uint8_t result = 0xff;
938 
	switch (m_address)
939 
	{
940 
		case 0x05:  // keyboard in
941 
			result = m_fm.intf().ymfm_external_read(ACCESS_IO, 1);
942 
			break;
943
944 
		case 0x09:  // ADPCM data
945 
		case 0x1a:
946 
			result = m_adpcm_b.read(m_address - 0x07);
947 
			break;
948
949 
		case 0x19:  // I/O data
950 
			result = m_fm.intf().ymfm_external_read(ACCESS_IO, 0);
951 
			break;
952
953 
		default:
954 
			debug::log_unexpected_read_write("Unexpected read from Y8950 data port %02X\n", m_address);
955 
			break;
956 
	}
957 
	return result;
958 
}
959
960
961 
//-------------------------------------------------
962 
//  read - handle a read from the device
963 
//-------------------------------------------------
964
965 
uint8_t y8950::read(uint32_t offset)
966 
{
967 
	uint8_t result = 0xff;
968 
	switch (offset & 1)
969 
	{
970 
		case 0: // status port
971 
			result = read_status();
972 
			break;
973
974 
		case 1: // when A0=1 datasheet says "the data on the bus are not guaranteed"
975 
			result = read_data();
976 
			break;
977 
	}
978 
	return result;
979 
}
980
981
982 
//-------------------------------------------------
983 
//  write_address - handle a write to the address
984 
//  register
985 
//-------------------------------------------------
986
987 
void y8950::write_address(uint8_t data)
988 
{
989 
	// Y8950 doesn't expose a busy signal, but it does indicate that
990 
	// address writes should be no faster than every 12 clocks
991 
	m_fm.intf().ymfm_set_busy_end(12 * m_fm.clock_prescale());
992
993 
	// just set the address
994 
	m_address = data;
995 
}
996
997
998 
//-------------------------------------------------
999 
//  write - handle a write to the register
1000 
//  interface
1001 
//-------------------------------------------------
1002
1003 
void y8950::write_data(uint8_t data)
1004 
{
1005 
	// Y8950 doesn't expose a busy signal, but it does indicate that
1006 
	// data writes should be no faster than every 12 clocks for
1007 
	// registers 00-1A, or every 84 clocks for other registers
1008 
	m_fm.intf().ymfm_set_busy_end(((m_address <= 0x1a) ? 12 : 84) * m_fm.clock_prescale());
1009
1010 
	// handle special addresses
1011 
	switch (m_address)
1012 
	{
1013 
		case 0x04:  // IRQ control
1014 
			m_fm.write(m_address, data);
1015 
			read_status();
1016 
			break;
1017
1018 
		case 0x06:  // keyboard out
1019 
			m_fm.intf().ymfm_external_write(ACCESS_IO, 1, data);
1020 
			break;
1021
1022 
		case 0x08:  // split FM/ADPCM-B
1023 
			m_adpcm_b.write(m_address - 0x07, (data & 0x0f) | 0x80);
1024 
			m_fm.write(m_address, data & 0xc0);
1025 
			break;
1026
1027 
		case 0x07:  // ADPCM-B registers
1028 
		case 0x09:
1029 
		case 0x0a:
1030 
		case 0x0b:
1031 
		case 0x0c:
1032 
		case 0x0d:
1033 
		case 0x0e:
1034 
		case 0x0f:
1035 
		case 0x10:
1036 
		case 0x11:
1037 
		case 0x12:
1038 
		case 0x15:
1039 
		case 0x16:
1040 
		case 0x17:
1041 
			m_adpcm_b.write(m_address - 0x07, data);
1042 
			break;
1043
1044 
		case 0x18:  // I/O direction
1045 
			m_io_ddr = data & 0x0f;
1046 
			break;
1047
1048 
		case 0x19:  // I/O data
1049 
			m_fm.intf().ymfm_external_write(ACCESS_IO, 0, data & m_io_ddr);
1050 
			break;
1051
1052 
		default:    // everything else to FM
1053 
			m_fm.write(m_address, data);
1054 
			break;
1055 
	}
1056 
}
1057
1058
1059 
//-------------------------------------------------
1060 
//  write - handle a write to the register
1061 
//  interface
1062 
//-------------------------------------------------
1063
1064 
void y8950::write(uint32_t offset, uint8_t data)
1065 
{
1066 
	switch (offset & 1)
1067 
	{
1068 
		case 0: // address port
1069 
			write_address(data);
1070 
			break;
1071
1072 
		case 1: // data port
1073 
			write_data(data);
1074 
			break;
1075 
	}
1076 
}
1077
1078
1079 
//-------------------------------------------------
1080 
//  generate - generate samples of sound
1081 
//-------------------------------------------------
1082
1083 
void y8950::generate(output_data *output, uint32_t numsamples)
1084 
{
1085 
	for (uint32_t samp = 0; samp < numsamples; samp++, output++)
1086 
	{
1087 
		// clock the system
1088 
		m_fm.clock(fm_engine::ALL_CHANNELS);
1089 
		m_adpcm_b.clock();
1090
1091 
		// update the FM content; clipping need verification
1092 
		m_fm.output(output->clear(), 1, 32767, fm_engine::ALL_CHANNELS);
1093
1094 
		// mix in the ADPCM; ADPCM-B is stereo, but only one channel
1095 
		// not sure how it's wired up internally
1096 
		m_adpcm_b.output(*output, 3);
1097
1098 
		// Y8950 uses an external DAC (YM3014) with mantissa/exponent format
1099 
		// convert to 10.3 floating point value and back to simulate truncation
1100 
		output->roundtrip_fp();
1101 
	}
1102 
}
1103
1104
1105
1106 
//*********************************************************
1107 
//  YM3812
1108 
//*********************************************************
1109
1110 
//-------------------------------------------------
1111 
//  ym3812 - constructor
1112 
//-------------------------------------------------
1113
1114 
ym3812::ym3812(ymfm_interface &intf) :
1115 
	m_address(0),
1116 
	m_fm(intf)
1117 
{
1118 
}
1119
1120
1121 
//-------------------------------------------------
1122 
//  reset - reset the system
1123 
//-------------------------------------------------
1124
1125 
void ym3812::reset()
1126 
{
1127 
	// reset the engines
1128 
	m_fm.reset();
1129 
}
1130
1131
1132 
//-------------------------------------------------
1133 
//  save_restore - save or restore the data
1134 
//-------------------------------------------------
1135
1136 
void ym3812::save_restore(ymfm_saved_state &state)
1137 
{
1138 
	state.save_restore(m_address);
1139 
	m_fm.save_restore(state);
1140 
}
1141
1142
1143 
//-------------------------------------------------
1144 
//  read_status - read the status register
1145 
//-------------------------------------------------
1146
1147 
uint8_t ym3812::read_status()
1148 
{
1149 
	return m_fm.status() | 0x06;
1150 
}
1151
1152
1153 
//-------------------------------------------------
1154 
//  read - handle a read from the device
1155 
//-------------------------------------------------
1156
1157 
uint8_t ym3812::read(uint32_t offset)
1158 
{
1159 
	uint8_t result = 0xff;
1160 
	switch (offset & 1)
1161 
	{
1162 
		case 0: // status port
1163 
			result = read_status();
1164 
			break;
1165
1166 
		case 1: // "inhibit" according to datasheet
1167 
			break;
1168 
	}
1169 
	return result;
1170 
}
1171
1172
1173 
//-------------------------------------------------
1174 
//  write_address - handle a write to the address
1175 
//  register
1176 
//-------------------------------------------------
1177
1178 
void ym3812::write_address(uint8_t data)
1179 
{
1180 
	// YM3812 doesn't expose a busy signal, but it does indicate that
1181 
	// address writes should be no faster than every 12 clocks
1182 
	m_fm.intf().ymfm_set_busy_end(12 * m_fm.clock_prescale());
1183
1184 
	// just set the address
1185 
	m_address = data;
1186 
}
1187
1188
1189 
//-------------------------------------------------
1190 
//  write - handle a write to the register
1191 
//  interface
1192 
//-------------------------------------------------
1193
1194 
void ym3812::write_data(uint8_t data)
1195 
{
1196 
	// YM3812 doesn't expose a busy signal, but it does indicate that
1197 
	// data writes should be no faster than every 84 clocks
1198 
	m_fm.intf().ymfm_set_busy_end(84 * m_fm.clock_prescale());
1199
1200 
	// write to FM
1201 
	m_fm.write(m_address, data);
1202 
}
1203
1204
1205 
//-------------------------------------------------
1206 
//  write - handle a write to the register
1207 
//  interface
1208 
//-------------------------------------------------
1209
1210 
void ym3812::write(uint32_t offset, uint8_t data)
1211 
{
1212 
	switch (offset & 1)
1213 
	{
1214 
		case 0: // address port
1215 
			write_address(data);
1216 
			break;
1217
1218 
		case 1: // data port
1219 
			write_data(data);
1220 
			break;
1221 
	}
1222 
}
1223
1224
1225 
//-------------------------------------------------
1226 
//  generate - generate samples of sound
1227 
//-------------------------------------------------
1228
1229 
void ym3812::generate(output_data *output, uint32_t numsamples)
1230 
{
1231 
	for (uint32_t samp = 0; samp < numsamples; samp++, output++)
1232 
	{
1233 
		// clock the system
1234 
		m_fm.clock(fm_engine::ALL_CHANNELS);
1235
1236 
		// update the FM content; mixing details for YM3812 need verification
1237 
		m_fm.output(output->clear(), 1, 32767, fm_engine::ALL_CHANNELS);
1238
1239 
		// YM3812 uses an external DAC (YM3014) with mantissa/exponent format
1240 
		// convert to 10.3 floating point value and back to simulate truncation
1241 
		output->roundtrip_fp();
1242 
	}
1243 
}
1244
1245
1246
1247 
//*********************************************************
1248 
//  YMF262
1249 
//*********************************************************
1250
1251 
//-------------------------------------------------
1252 
//  ymf262 - constructor
1253 
//-------------------------------------------------
1254
1255 
ymf262::ymf262(ymfm_interface &intf) :
1256 
	m_address(0),
1257 
	m_fm(intf)
1258 
{
1259 
}
1260
1261
1262 
//-------------------------------------------------
1263 
//  reset - reset the system
1264 
//-------------------------------------------------
1265
1266 
void ymf262::reset()
1267 
{
1268 
	// reset the engines
1269 
	m_fm.reset();
1270 
}
1271
1272
1273 
//-------------------------------------------------
1274 
//  save_restore - save or restore the data
1275 
//-------------------------------------------------
1276
1277 
void ymf262::save_restore(ymfm_saved_state &state)
1278 
{
1279 
	state.save_restore(m_address);
1280 
	m_fm.save_restore(state);
1281 
}
1282
1283
1284 
//-------------------------------------------------
1285 
//  read_status - read the status register
1286 
//-------------------------------------------------
1287
1288 
uint8_t ymf262::read_status()
1289 
{
1290 
	return m_fm.status();
1291 
}
1292
1293
1294 
//-------------------------------------------------
1295 
//  read - handle a read from the device
1296 
//-------------------------------------------------
1297
1298 
uint8_t ymf262::read(uint32_t offset)
1299 
{
1300 
	uint8_t result = 0xff;
1301 
	switch (offset & 3)
1302 
	{
1303 
		case 0: // status port
1304 
			result = read_status();
1305 
			break;
1306
1307 
		case 1:
1308 
		case 2:
1309 
		case 3:
1310 
			debug::log_unexpected_read_write("Unexpected read from YMF262 offset %d\n", offset & 3);
1311 
			break;
1312 
	}
1313 
	return result;
1314 
}
1315
1316
1317 
//-------------------------------------------------
1318 
//  write_address - handle a write to the address
1319 
//  register
1320 
//-------------------------------------------------
1321
1322 
void ymf262::write_address(uint8_t data)
1323 
{
1324 
	// YMF262 doesn't expose a busy signal, but it does indicate that
1325 
	// address writes should be no faster than every 32 clocks
1326 
	m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale());
1327
1328 
	// just set the address
1329 
	m_address = data;
1330 
}
1331
1332
1333 
//-------------------------------------------------
1334 
//  write_data - handle a write to the data
1335 
//  register
1336 
//-------------------------------------------------
1337
1338 
void ymf262::write_data(uint8_t data)
1339 
{
1340 
	// YMF262 doesn't expose a busy signal, but it does indicate that
1341 
	// data writes should be no faster than every 32 clocks
1342 
	m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale());
1343
1344 
	// write to FM
1345 
	m_fm.write(m_address, data);
1346 
}
1347
1348
1349 
//-------------------------------------------------
1350 
//  write_address_hi - handle a write to the upper
1351 
//  address register
1352 
//-------------------------------------------------
1353
1354 
void ymf262::write_address_hi(uint8_t data)
1355 
{
1356 
	// YMF262 doesn't expose a busy signal, but it does indicate that
1357 
	// address writes should be no faster than every 32 clocks
1358 
	m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale());
1359
1360 
	// just set the address
1361 
	m_address = data | 0x100;
1362
1363 
	// tests reveal that in compatibility mode, upper bit is masked
1364 
	// except for register 0x105
1365 
	if (m_fm.regs().newflag() == 0 && m_address != 0x105)
1366 
		m_address &= 0xff;
1367 
}
1368
1369
1370 
//-------------------------------------------------
1371 
//  write - handle a write to the register
1372 
//  interface
1373 
//-------------------------------------------------
1374
1375 
void ymf262::write(uint32_t offset, uint8_t data)
1376 
{
1377 
	switch (offset & 3)
1378 
	{
1379 
		case 0: // address port
1380 
			write_address(data);
1381 
			break;
1382
1383 
		case 1: // data port
1384 
			write_data(data);
1385 
			break;
1386
1387 
		case 2: // address port
1388 
			write_address_hi(data);
1389 
			break;
1390
1391 
		case 3: // data port
1392 
			write_data(data);
1393 
			break;
1394 
	}
1395 
}
1396
1397
1398 
//-------------------------------------------------
1399 
//  generate - generate samples of sound
1400 
//-------------------------------------------------
1401
1402 
void ymf262::generate(output_data *output, uint32_t numsamples)
1403 
{
1404 
	for (uint32_t samp = 0; samp < numsamples; samp++, output++)
1405 
	{
1406 
		// clock the system
1407 
		m_fm.clock(fm_engine::ALL_CHANNELS);
1408
1409 
		// update the FM content; mixing details for YMF262 need verification
1410 
		m_fm.output(output->clear(), 0, 32767, fm_engine::ALL_CHANNELS);
1411
1412 
		// YMF262 output is 16-bit offset serial via YAC512 DAC
1413 
		output->clamp16();
1414 
	}
1415 
}
1416
1417
1418
1419 
//*********************************************************
1420 
//  YMF289B
1421 
//*********************************************************
1422
1423 
// YMF289B is a YMF262 with the following changes:
1424 
//   * "Power down" mode added
1425 
//   * Bulk register clear added
1426 
//   * Busy flag added to the status register
1427 
//   * Shorter busy times
1428 
//   * All registers can be read
1429 
//   * Only 2 outputs exposed
1430
1431 
//-------------------------------------------------
1432 
//  ymf289b - constructor
1433 
//-------------------------------------------------
1434
1435 
ymf289b::ymf289b(ymfm_interface &intf) :
1436 
	m_address(0),
1437 
	m_fm(intf)
1438 
{
1439 
}
1440
1441
1442 
//-------------------------------------------------
1443 
//  reset - reset the system
1444 
//-------------------------------------------------
1445
1446 
void ymf289b::reset()
1447 
{
1448 
	// reset the engines
1449 
	m_fm.reset();
1450 
}
1451
1452
1453 
//-------------------------------------------------
1454 
//  save_restore - save or restore the data
1455 
//-------------------------------------------------
1456
1457 
void ymf289b::save_restore(ymfm_saved_state &state)
1458 
{
1459 
	state.save_restore(m_address);
1460 
	m_fm.save_restore(state);
1461 
}
1462
1463
1464 
//-------------------------------------------------
1465 
//  read_status - read the status register
1466 
//-------------------------------------------------
1467
1468 
uint8_t ymf289b::read_status()
1469 
{
1470 
	uint8_t result = m_fm.status();
1471
1472 
	// YMF289B adds a busy flag
1473 
	if (ymf289b_mode() && m_fm.intf().ymfm_is_busy())
1474 
		result |= STATUS_BUSY_FLAGS;
1475 
	return result;
1476 
}
1477
1478
1479 
//-------------------------------------------------
1480 
//  read_data - read the data register
1481 
//-------------------------------------------------
1482
1483 
uint8_t ymf289b::read_data()
1484 
{
1485 
	uint8_t result = 0xff;
1486
1487 
	// YMF289B can read register data back
1488 
	if (ymf289b_mode())
1489 
		result = m_fm.regs().read(m_address);
1490 
	return result;
1491 
}
1492
1493
1494 
//-------------------------------------------------
1495 
//  read - handle a read from the device
1496 
//-------------------------------------------------
1497
1498 
uint8_t ymf289b::read(uint32_t offset)
1499 
{
1500 
	uint8_t result = 0xff;
1501 
	switch (offset & 3)
1502 
	{
1503 
		case 0: // status port
1504 
			result = read_status();
1505 
			break;
1506
1507 
		case 1:	// data port
1508 
			result = read_data();
1509 
			break;
1510
1511 
		case 2:
1512 
		case 3:
1513 
			debug::log_unexpected_read_write("Unexpected read from YMF289B offset %d\n", offset & 3);
1514 
			break;
1515 
	}
1516 
	return result;
1517 
}
1518
1519
1520 
//-------------------------------------------------
1521 
//  write_address - handle a write to the address
1522 
//  register
1523 
//-------------------------------------------------
1524
1525 
void ymf289b::write_address(uint8_t data)
1526 
{
1527 
	m_address = data;
1528
1529 
	// count busy time
1530 
	m_fm.intf().ymfm_set_busy_end(56);
1531 
}
1532
1533
1534 
//-------------------------------------------------
1535 
//  write_data - handle a write to the data
1536 
//  register
1537 
//-------------------------------------------------
1538
1539 
void ymf289b::write_data(uint8_t data)
1540 
{
1541 
	// write to FM
1542 
	m_fm.write(m_address, data);
1543
1544 
	// writes to 0x108 with the CLR flag set clear the registers
1545 
	if (m_address == 0x108 && bitfield(data, 2) != 0)
1546 
		m_fm.regs().reset();
1547
1548 
	// count busy time
1549 
	m_fm.intf().ymfm_set_busy_end(56);
1550 
}
1551
1552
1553 
//-------------------------------------------------
1554 
//  write_address_hi - handle a write to the upper
1555 
//  address register
1556 
//-------------------------------------------------
1557
1558 
void ymf289b::write_address_hi(uint8_t data)
1559 
{
1560 
	// just set the address
1561 
	m_address = data | 0x100;
1562
1563 
	// tests reveal that in compatibility mode, upper bit is masked
1564 
	// except for register 0x105
1565 
	if (m_fm.regs().newflag() == 0 && m_address != 0x105)
1566 
		m_address &= 0xff;
1567
1568 
	// count busy time
1569 
	m_fm.intf().ymfm_set_busy_end(56);
1570 
}
1571
1572
1573 
//-------------------------------------------------
1574 
//  write - handle a write to the register
1575 
//  interface
1576 
//-------------------------------------------------
1577
1578 
void ymf289b::write(uint32_t offset, uint8_t data)
1579 
{
1580 
	switch (offset & 3)
1581 
	{
1582 
		case 0: // address port
1583 
			write_address(data);
1584 
			break;
1585
1586 
		case 1: // data port
1587 
			write_data(data);
1588 
			break;
1589
1590 
		case 2: // address port
1591 
			write_address_hi(data);
1592 
			break;
1593
1594 
		case 3: // data port
1595 
			write_data(data);
1596 
			break;
1597 
	}
1598 
}
1599
1600
1601 
//-------------------------------------------------
1602 
//  generate - generate samples of sound
1603 
//-------------------------------------------------
1604
1605 
void ymf289b::generate(output_data *output, uint32_t numsamples)
1606 
{
1607 
	for (uint32_t samp = 0; samp < numsamples; samp++, output++)
1608 
	{
1609 
		// clock the system
1610 
		m_fm.clock(fm_engine::ALL_CHANNELS);
1611
1612 
		// update the FM content; mixing details for YMF262 need verification
1613 
		fm_engine::output_data full;
1614 
		m_fm.output(full.clear(), 0, 32767, fm_engine::ALL_CHANNELS);
1615
1616 
		// YMF278B output is 16-bit offset serial via YAC512 DAC, but
1617 
		// only 2 of the 4 outputs are exposed
1618 
		output->data[0] = full.data[0];
1619 
		output->data[1] = full.data[1];
1620 
		output->clamp16();
1621 
	}
1622 
}
1623
1624
1625
1626 
//*********************************************************
1627 
//  YMF278B
1628 
//*********************************************************
1629
1630 
//-------------------------------------------------
1631 
//  ymf278b - constructor
1632 
//-------------------------------------------------
1633
1634 
ymf278b::ymf278b(ymfm_interface &intf) :
1635 
	m_address(0),
1636 
	m_fm_pos(0),
1637 
	m_load_remaining(0),
1638 
	m_next_status_id(false),
1639 
	m_fm(intf),
1640 
	m_pcm(intf)
1641 
{
1642 
}
1643
1644
1645 
//-------------------------------------------------
1646 
//  reset - reset the system
1647 
//-------------------------------------------------
1648
1649 
void ymf278b::reset()
1650 
{
1651 
	// reset the engines
1652 
	m_fm.reset();
1653 
	m_pcm.reset();
1654
1655 
	// next status read will return ID
1656 
	m_next_status_id = true;
1657 
}
1658
1659
1660 
//-------------------------------------------------
1661 
//  save_restore - save or restore the data
1662 
//-------------------------------------------------
1663
1664 
void ymf278b::save_restore(ymfm_saved_state &state)
1665 
{
1666 
	state.save_restore(m_address);
1667 
	state.save_restore(m_fm_pos);
1668 
	state.save_restore(m_load_remaining);
1669 
	state.save_restore(m_next_status_id);
1670 
	m_fm.save_restore(state);
1671 
	m_pcm.save_restore(state);
1672 
}
1673
1674
1675 
//-------------------------------------------------
1676 
//  read_status - read the status register
1677 
//-------------------------------------------------
1678
1679 
uint8_t ymf278b::read_status()
1680 
{
1681 
	uint8_t result;
1682
1683 
	// first status read after initialization returns a chip ID, which
1684 
	// varies based on the "new" flags, indicating the mode
1685 
	if (m_next_status_id)
1686 
	{
1687 
		if (m_fm.regs().new2flag())
1688 
			result = 0x02;
1689 
		else if (m_fm.regs().newflag())
1690 
			result = 0x00;
1691 
		else
1692 
			result = 0x06;
1693 
		m_next_status_id = false;
1694 
	}
1695 
	else
1696 
	{
1697 
		result = m_fm.status();
1698 
		if (m_fm.intf().ymfm_is_busy())
1699 
			result |= STATUS_BUSY;
1700 
		if (m_load_remaining != 0)
1701 
			result |= STATUS_LD;
1702
1703 
		// if new2 flag is not set, we're in OPL2 or OPL3 mode
1704 
		if (!m_fm.regs().new2flag())
1705 
			result &= ~(STATUS_BUSY | STATUS_LD);
1706 
	}
1707 
	return result;
1708 
}
1709
1710
1711 
//-------------------------------------------------
1712 
//  write_data_pcm - handle a write to the PCM data
1713 
//  register
1714 
//-------------------------------------------------
1715
1716 
uint8_t ymf278b::read_data_pcm()
1717 
{
1718 
	// read from PCM
1719 
	if (bitfield(m_address, 9) != 0)
1720 
	{
1721 
		uint8_t result = m_pcm.read(m_address & 0xff);
1722 
		if ((m_address & 0xff) == 0x02)
1723 
			result |= 0x20;
1724
1725 
		return result;
1726 
	}
1727 
	return 0;
1728 
}
1729
1730
1731 
//-------------------------------------------------
1732 
//  read - handle a read from the device
1733 
//-------------------------------------------------
1734
1735 
uint8_t ymf278b::read(uint32_t offset)
1736 
{
1737 
	uint8_t result = 0xff;
1738 
	switch (offset & 7)
1739 
	{
1740 
		case 0: // status port
1741 
			result = read_status();
1742 
			break;
1743
1744 
		case 5: // PCM data port
1745 
			result = read_data_pcm();
1746 
			break;
1747
1748 
		default:
1749 
			debug::log_unexpected_read_write("Unexpected read from ymf278b offset %d\n", offset & 3);
1750 
			break;
1751 
	}
1752 
	return result;
1753 
}
1754
1755
1756 
//-------------------------------------------------
1757 
//  write_address - handle a write to the address
1758 
//  register
1759 
//-------------------------------------------------
1760
1761 
void ymf278b::write_address(uint8_t data)
1762 
{
1763 
	// just set the address
1764 
	m_address = data;
1765 
}
1766
1767
1768 
//-------------------------------------------------
1769 
//  write_data - handle a write to the data
1770 
//  register
1771 
//-------------------------------------------------
1772
1773 
void ymf278b::write_data(uint8_t data)
1774 
{
1775 
	// write to FM
1776 
	if (bitfield(m_address, 9) == 0)
1777 
	{
1778 
		uint8_t old = m_fm.regs().new2flag();
1779 
		m_fm.write(m_address, data);
1780
1781 
		// changing NEW2 from 0->1 causes the next status read to
1782 
		// return the chip ID
1783 
		if (old == 0 && m_fm.regs().new2flag() != 0)
1784 
			m_next_status_id = true;
1785 
	}
1786
1787 
	// BUSY goes for 56 clocks on FM writes
1788 
	m_fm.intf().ymfm_set_busy_end(56);
1789 
}
1790
1791
1792 
//-------------------------------------------------
1793 
//  write_address_hi - handle a write to the upper
1794 
//  address register
1795 
//-------------------------------------------------
1796
1797 
void ymf278b::write_address_hi(uint8_t data)
1798 
{
1799 
	// just set the address
1800 
	m_address = data | 0x100;
1801
1802 
	// YMF262, in compatibility mode, treats the upper bit as masked
1803 
	// except for register 0x105; assuming YMF278B works the same way?
1804 
	if (m_fm.regs().newflag() == 0 && m_address != 0x105)
1805 
		m_address &= 0xff;
1806 
}
1807
1808
1809 
//-------------------------------------------------
1810 
//  write_address_pcm - handle a write to the upper
1811 
//  address register
1812 
//-------------------------------------------------
1813
1814 
void ymf278b::write_address_pcm(uint8_t data)
1815 
{
1816 
	// just set the address
1817 
	m_address = data | 0x200;
1818 
}
1819
1820
1821 
//-------------------------------------------------
1822 
//  write_data_pcm - handle a write to the PCM data
1823 
//  register
1824 
//-------------------------------------------------
1825
1826 
void ymf278b::write_data_pcm(uint8_t data)
1827 
{
1828 
	// ignore data writes if new2 is not yet set
1829 
	if (m_fm.regs().new2flag() == 0)
1830 
		return;
1831
1832 
	// write to FM
1833 
	if (bitfield(m_address, 9) != 0)
1834 
	{
1835 
		uint8_t addr = m_address & 0xff;
1836 
		m_pcm.write(addr, data);
1837
1838 
		// writes to the waveform number cause loads to happen for "about 300usec"
1839 
		// which is ~13 samples at the nominal output frequency of 44.1kHz
1840 
		if (addr >= 0x08 && addr <= 0x1f)
1841 
			m_load_remaining = 13;
1842 
	}
1843
1844 
	// BUSY goes for 88 clocks on PCM writes
1845 
	m_fm.intf().ymfm_set_busy_end(88);
1846 
}
1847
1848
1849 
//-------------------------------------------------
1850 
//  write - handle a write to the register
1851 
//  interface
1852 
//-------------------------------------------------
1853
1854 
void ymf278b::write(uint32_t offset, uint8_t data)
1855 
{
1856 
	switch (offset & 7)
1857 
	{
1858 
		case 0: // address port
1859 
			write_address(data);
1860 
			break;
1861
1862 
		case 1: // data port
1863 
			write_data(data);
1864 
			break;
1865
1866 
		case 2: // address port
1867 
			write_address_hi(data);
1868 
			break;
1869
1870 
		case 3: // data port
1871 
			write_data(data);
1872 
			break;
1873
1874 
		case 4: // PCM address port
1875 
			write_address_pcm(data);
1876 
			break;
1877
1878 
		case 5: // PCM address port
1879 
			write_data_pcm(data);
1880 
			break;
1881
1882 
		default:
1883 
			debug::log_unexpected_read_write("Unexpected write to ymf278b offset %d\n", offset & 7);
1884 
			break;
1885 
	}
1886 
}
1887
1888
1889 
//-------------------------------------------------
1890 
//  generate - generate one sample of sound
1891 
//-------------------------------------------------
1892
1893 
void ymf278b::generate(output_data *output, uint32_t numsamples)
1894 
{
1895 
	static const int16_t s_mix_scale[8] = { 0x7fa, 0x5a4, 0x3fd, 0x2d2, 0x1fe, 0x169, 0xff, 0 };
1896 
	int32_t const pcm_l = s_mix_scale[m_pcm.regs().mix_pcm_l()];
1897 
	int32_t const pcm_r = s_mix_scale[m_pcm.regs().mix_pcm_r()];
1898 
	int32_t const fm_l = s_mix_scale[m_pcm.regs().mix_fm_l()];
1899 
	int32_t const fm_r = s_mix_scale[m_pcm.regs().mix_fm_r()];
1900 
	for (uint32_t samp = 0; samp < numsamples; samp++, output++)
1901 
	{
1902 
		// clock the system
1903 
		m_fm_pos += FM_EXTRA_SAMPLE_STEP;
1904 
		if (m_fm_pos >= FM_EXTRA_SAMPLE_THRESH)
1905 
		{
1906 
			m_fm.clock(fm_engine::ALL_CHANNELS);
1907 
			m_fm_pos -= FM_EXTRA_SAMPLE_THRESH;
1908 
		}
1909 
		m_fm.clock(fm_engine::ALL_CHANNELS);
1910 
		m_pcm.clock(pcm_engine::ALL_CHANNELS);
1911
1912 
		// update the FM content; mixing details for YMF278B need verification
1913 
		fm_engine::output_data fmout;
1914 
		m_fm.output(fmout.clear(), 0, 32767, fm_engine::ALL_CHANNELS);
1915
1916 
		// update the PCM content
1917 
		pcm_engine::output_data pcmout;
1918 
		m_pcm.output(pcmout.clear(), pcm_engine::ALL_CHANNELS);
1919
1920 
		// DO0 output: FM channels 2+3 only
1921 
		output->data[0] = fmout.data[2];
1922 
		output->data[1] = fmout.data[3];
1923
1924 
		// DO1 output: wavetable channels 2+3 only
1925 
		output->data[2] = pcmout.data[2];
1926 
		output->data[3] = pcmout.data[3];
1927
1928 
		// DO2 output: mixed FM channels 0+1 and wavetable channels 0+1
1929 
		output->data[4] = (fmout.data[0] * fm_l + pcmout.data[0] * pcm_l) >> 11;
1930 
		output->data[5] = (fmout.data[1] * fm_r + pcmout.data[1] * pcm_r) >> 11;
1931
1932 
		// YMF278B output is 16-bit 2s complement serial
1933 
		output->clamp16();
1934 
	}
1935
1936 
	// decrement the load waiting count
1937 
	if (m_load_remaining > 0)
1938 
		m_load_remaining -= std::min(m_load_remaining, numsamples);
1939 
}
1940
1941
1942
1943 
//*********************************************************
1944 
//  OPLL BASE
1945 
//*********************************************************
1946
1947 
//-------------------------------------------------
1948 
//  opll_base - constructor
1949 
//-------------------------------------------------
1950
1951 
opll_base::opll_base(ymfm_interface &intf, uint8_t const *instrument_data) :
1952 
	m_address(0),
1953 
	m_fm(intf)
1954 
{
1955 
	m_fm.regs().set_instrument_data(instrument_data);
1956 
}
1957
1958
1959 
//-------------------------------------------------
1960 
//  reset - reset the system
1961 
//-------------------------------------------------
1962
1963 
void opll_base::reset()
1964 
{
1965 
	// reset the engines
1966 
	m_fm.reset();
1967 
}
1968
1969
1970 
//-------------------------------------------------
1971 
//  save_restore - save or restore the data
1972 
//-------------------------------------------------
1973
1974 
void opll_base::save_restore(ymfm_saved_state &state)
1975 
{
1976 
	state.save_restore(m_address);
1977 
	m_fm.save_restore(state);
1978 
}
1979
1980
1981 
//-------------------------------------------------
1982 
//  write_address - handle a write to the address
1983 
//  register
1984 
//-------------------------------------------------
1985
1986 
void opll_base::write_address(uint8_t data)
1987 
{
1988 
	// OPLL doesn't expose a busy signal, but datasheets are pretty consistent
1989 
	// in indicating that address writes should be no faster than every 12 clocks
1990 
	m_fm.intf().ymfm_set_busy_end(12);
1991
1992 
	// just set the address
1993 
	m_address = data;
1994 
}
1995
1996
1997 
//-------------------------------------------------
1998 
//  write - handle a write to the register
1999 
//  interface
2000 
//-------------------------------------------------
2001
2002 
void opll_base::write_data(uint8_t data)
2003 
{
2004 
	// OPLL doesn't expose a busy signal, but datasheets are pretty consistent
2005 
	// in indicating that address writes should be no faster than every 84 clocks
2006 
	m_fm.intf().ymfm_set_busy_end(84);
2007
2008 
	// write to FM
2009 
	m_fm.write(m_address, data);
2010 
}
2011
2012
2013 
//-------------------------------------------------
2014 
//  write - handle a write to the register
2015 
//  interface
2016 
//-------------------------------------------------
2017
2018 
void opll_base::write(uint32_t offset, uint8_t data)
2019 
{
2020 
	switch (offset & 1)
2021 
	{
2022 
		case 0: // address port
2023 
			write_address(data);
2024 
			break;
2025
2026 
		case 1: // data port
2027 
			write_data(data);
2028 
			break;
2029 
	}
2030 
}
2031
2032
2033 
//-------------------------------------------------
2034 
//  generate - generate one sample of sound
2035 
//-------------------------------------------------
2036
2037 
void opll_base::generate(output_data *output, uint32_t numsamples)
2038 
{
2039 
	for (uint32_t samp = 0; samp < numsamples; samp++, output++)
2040 
	{
2041 
		// clock the system
2042 
		m_fm.clock(fm_engine::ALL_CHANNELS);
2043
2044 
		// update the FM content; OPLL has a built-in 9-bit DAC
2045 
		m_fm.output(output->clear(), 5, 256, fm_engine::ALL_CHANNELS);
2046
2047 
		// final output is multiplexed; we don't simulate that here except
2048 
		// to average over everything
2049 
		output->data[0] = (output->data[0] * 128) / 9;
2050 
		output->data[1] = (output->data[1] * 128) / 9;
2051 
	}
2052 
}
2053
2054
2055
2056 
//*********************************************************
2057 
//  YM2413
2058 
//*********************************************************
2059
2060 
//-------------------------------------------------
2061 
//  ym2413 - constructor
2062 
//-------------------------------------------------
2063
2064 
ym2413::ym2413(ymfm_interface &intf, uint8_t const *instrument_data) :
2065 
	opll_base(intf, (instrument_data != nullptr) ? instrument_data : s_default_instruments)
2066 
{
2067 
};
2068
2069 
// table below taken from https://github.com/plgDavid/misc/wiki/Copyright-free-OPLL(x)-ROM-patches
2070 
uint8_t const ym2413::s_default_instruments[] =
2071 
{
2072 
	//April 2015 David Viens, tweaked May 19-21th 2015 Hubert Lamontagne
2073 
	0x71, 0x61, 0x1E, 0x17, 0xEF, 0x7F, 0x00, 0x17, //Violin
2074 
	0x13, 0x41, 0x1A, 0x0D, 0xF8, 0xF7, 0x23, 0x13, //Guitar
2075 
	0x13, 0x01, 0x99, 0x00, 0xF2, 0xC4, 0x11, 0x23, //Piano
2076 
	0x31, 0x61, 0x0E, 0x07, 0x98, 0x64, 0x70, 0x27, //Flute
2077 
	0x22, 0x21, 0x1E, 0x06, 0xBF, 0x76, 0x00, 0x28, //Clarinet
2078 
	0x31, 0x22, 0x16, 0x05, 0xE0, 0x71, 0x0F, 0x18, //Oboe
2079 
	0x21, 0x61, 0x1D, 0x07, 0x82, 0x8F, 0x10, 0x07, //Trumpet
2080 
	0x23, 0x21, 0x2D, 0x14, 0xFF, 0x7F, 0x00, 0x07, //Organ
2081 
	0x41, 0x61, 0x1B, 0x06, 0x64, 0x65, 0x10, 0x17, //Horn
2082 
	0x61, 0x61, 0x0B, 0x18, 0x85, 0xFF, 0x81, 0x07, //Synthesizer
2083 
	0x13, 0x01, 0x83, 0x11, 0xFA, 0xE4, 0x10, 0x04, //Harpsichord
2084 
	0x17, 0x81, 0x23, 0x07, 0xF8, 0xF8, 0x22, 0x12, //Vibraphone
2085 
	0x61, 0x50, 0x0C, 0x05, 0xF2, 0xF5, 0x29, 0x42, //Synthesizer Bass
2086 
	0x01, 0x01, 0x54, 0x03, 0xC3, 0x92, 0x03, 0x02, //Acoustic Bass
2087 
	0x41, 0x41, 0x89, 0x03, 0xF1, 0xE5, 0x11, 0x13, //Electric Guitar
2088 
	0x01, 0x01, 0x18, 0x0F, 0xDF, 0xF8, 0x6A, 0x6D, //rhythm 1
2089 
	0x01, 0x01, 0x00, 0x00, 0xC8, 0xD8, 0xA7, 0x48, //rhythm 2
2090 
	0x05, 0x01, 0x00, 0x00, 0xF8, 0xAA, 0x59, 0x55  //rhythm 3
2091 
};
2092
2093
2094
2095 
//*********************************************************
2096 
//  YM2423
2097 
//*********************************************************
2098
2099 
//-------------------------------------------------
2100 
//  ym2423 - constructor
2101 
//-------------------------------------------------
2102
2103 
ym2423::ym2423(ymfm_interface &intf, uint8_t const *instrument_data) :
2104 
	opll_base(intf, (instrument_data != nullptr) ? instrument_data : s_default_instruments)
2105 
{
2106 
};
2107
2108 
// table below taken from https://github.com/plgDavid/misc/wiki/Copyright-free-OPLL(x)-ROM-patches
2109 
uint8_t const ym2423::s_default_instruments[] =
2110 
{
2111 
	// May 4-6 2016 Hubert Lamontagne
2112 
	// Doesn't seem to have any diff between opllx-x and opllx-y
2113 
	// Drums seem identical to regular opll
2114 
	0x61, 0x61, 0x1B, 0x07, 0x94, 0x5F, 0x10, 0x06, //1	Strings	Saw wave with vibrato Violin
2115 
	0x93, 0xB1, 0x51, 0x04, 0xF3, 0xF2, 0x70, 0xFB, //2	Guitar	Jazz GuitarPiano
2116 
	0x41, 0x21, 0x11, 0x85, 0xF2, 0xF2, 0x70, 0x75, //3	Electric Guitar	Same as OPLL No.15 Synth
2117 
	0x93, 0xB2, 0x28, 0x07, 0xF3, 0xF2, 0x70, 0xB4, //4	Electric Piano 2	Slow attack, tremoloDing-a-ling
2118 
	0x72, 0x31, 0x97, 0x05, 0x51, 0x6F, 0x60, 0x09, //5 	Flute	Same as OPLL No.4Clarinet
2119 
	0x13, 0x30, 0x18, 0x06, 0xF7, 0xF4, 0x50, 0x85, //6	Marimba 	Also be used as steel drumXyophone
2120 
	0x51, 0x31, 0x1C, 0x07, 0x51, 0x71, 0x20, 0x26, //7	Trumpet 	Same as OPLL No.7Trumpet
2121 
	0x41, 0xF4, 0x1B, 0x07, 0x74, 0x34, 0x00, 0x06, //8	Harmonica Harmonica synth
2122 
	0x50, 0x30, 0x4D, 0x03, 0x42, 0x65, 0x20, 0x06, //9	Tuba Tuba
2123 
	0x40, 0x20, 0x10, 0x85, 0xF3, 0xF5, 0x20, 0x04, //10 	Synth Brass 2 Synth sweep
2124 
	0x61, 0x61, 0x1B, 0x07, 0xC5, 0x96, 0xF3, 0xF6, //11 	Short Saw	Saw wave with short envelopeSynth hit
2125 
	0xF9, 0xF1, 0xDC, 0x00, 0xF5, 0xF3, 0x77, 0xF2, //12 	Vibraphone	Bright vibraphoneVibes
2126 
	0x60, 0xA2, 0x91, 0x03, 0x94, 0xC1, 0xF7, 0xF7, //13 	Electric Guitar 2	Clean guitar with feedbackHarmonic bass
2127 
	0x30, 0x30, 0x17, 0x06, 0xF3, 0xF1, 0xB7, 0xFC, //14 	Synth Bass 2Snappy bass
2128 
	0x31, 0x36, 0x0D, 0x05, 0xF2, 0xF4, 0x27, 0x9C, //15 	Sitar	Also be used as ShamisenBanjo
2129 
	0x01, 0x01, 0x18, 0x0F, 0xDF, 0xF8, 0x6A, 0x6D, //rhythm 1
2130 
	0x01, 0x01, 0x00, 0x00, 0xC8, 0xD8, 0xA7, 0x48, //rhythm 2
2131 
	0x05, 0x01, 0x00, 0x00, 0xF8, 0xAA, 0x59, 0x55  //rhythm 3
2132 
};
2133
2134
2135
2136 
//*********************************************************
2137 
//  YMF281
2138 
//*********************************************************
2139
2140 
//-------------------------------------------------
2141 
//  ymf281 - constructor
2142 
//-------------------------------------------------
2143
2144 
ymf281::ymf281(ymfm_interface &intf, uint8_t const *instrument_data) :
2145 
	opll_base(intf, (instrument_data != nullptr) ? instrument_data : s_default_instruments)
2146 
{
2147 
};
2148
2149 
// table below taken from https://github.com/plgDavid/misc/wiki/Copyright-free-OPLL(x)-ROM-patches
2150 
uint8_t const ymf281::s_default_instruments[] =
2151 
{
2152 
	// May 14th 2015 Hubert Lamontagne
2153 
	0x72, 0x21, 0x1A, 0x07, 0xF6, 0x64, 0x01, 0x16, // Clarinet ~~ Electric String 	Square wave with vibrato
2154 
	0x00, 0x10, 0x45, 0x00, 0xF6, 0x83, 0x73, 0x63, // Synth Bass ~~ Bow wow 	Triangular wave
2155 
	0x13, 0x01, 0x96, 0x00, 0xF1, 0xF4, 0x31, 0x23, // Piano ~~ Electric Guitar 	Despite of its name, same as Piano of YM2413.
2156 
	0x71, 0x21, 0x0B, 0x0F, 0xF9, 0x64, 0x70, 0x17, // Flute ~~ Organ 	Sine wave
2157 
	0x02, 0x21, 0x1E, 0x06, 0xF9, 0x76, 0x00, 0x28, // Square Wave ~~ Clarinet 	Same as ones of YM2413.
2158 
	0x00, 0x61, 0x82, 0x0E, 0xF9, 0x61, 0x20, 0x27, // Space Oboe ~~ Saxophone 	Saw wave with vibrato
2159 
	0x21, 0x61, 0x1B, 0x07, 0x84, 0x8F, 0x10, 0x07, // Trumpet ~~ Trumpet 	Same as ones of YM2413.
2160 
	0x37, 0x32, 0xCA, 0x02, 0x66, 0x64, 0x47, 0x29, // Wow Bell ~~ Street Organ 	Calliope
2161 
	0x41, 0x41, 0x07, 0x03, 0xF5, 0x70, 0x51, 0xF5, // Electric Guitar ~~ Synth Brass 	Same as Synthesizer of YM2413.
2162 
	0x36, 0x01, 0x5E, 0x07, 0xF2, 0xF3, 0xF7, 0xF7, // Vibes ~~ Electric Piano 	Simulate of Rhodes Piano
2163 
	0x00, 0x00, 0x18, 0x06, 0xC5, 0xF3, 0x20, 0xF2, // Bass ~~ Bass 	Electric bass
2164 
	0x17, 0x81, 0x25, 0x07, 0xF7, 0xF3, 0x21, 0xF7, // Vibraphone ~~ Vibraphone	Same as ones of YM2413.
2165 
	0x35, 0x64, 0x00, 0x00, 0xFF, 0xF3, 0x77, 0xF5, // Vibrato Bell ~~ Chime 	Bell
2166 
	0x11, 0x31, 0x00, 0x07, 0xDD, 0xF3, 0xFF, 0xFB, // Click Sine ~~ Tom Tom II 	Tom
2167 
	0x3A, 0x21, 0x00, 0x07, 0x95, 0x84, 0x0F, 0xF5, // Noise and Tone ~~ Noise 	for S.E.
2168 
	0x01, 0x01, 0x18, 0x0F, 0xDF, 0xF8, 0x6A, 0x6D, //rhythm 1
2169 
	0x01, 0x01, 0x00, 0x00, 0xC8, 0xD8, 0xA7, 0x48, //rhythm 2
2170 
	0x05, 0x01, 0x00, 0x00, 0xF8, 0xAA, 0x59, 0x55  //rhythm 3
2171 
};
2172
2173
2174
2175 
//*********************************************************
2176 
//  DS1001
2177 
//*********************************************************
2178
2179 
//-------------------------------------------------
2180 
//  ds1001 - constructor
2181 
//-------------------------------------------------
2182
2183 
ds1001::ds1001(ymfm_interface &intf, uint8_t const *instrument_data) :
2184 
	opll_base(intf, (instrument_data != nullptr) ? instrument_data : s_default_instruments)
2185 
{
2186 
};
2187
2188 
// table below taken from https://github.com/plgDavid/misc/wiki/Copyright-free-OPLL(x)-ROM-patches
2189 
uint8_t const ds1001::s_default_instruments[] =
2190 
{
2191 
	// May 15th 2015 Hubert Lamontagne & David Viens
2192 
	0x03, 0x21, 0x05, 0x06, 0xC8, 0x81, 0x42, 0x27, // Buzzy Bell
2193 
	0x13, 0x41, 0x14, 0x0D, 0xF8, 0xF7, 0x23, 0x12, // Guitar
2194 
	0x31, 0x11, 0x08, 0x08, 0xFA, 0xC2, 0x28, 0x22, // Wurly
2195 
	0x31, 0x61, 0x0C, 0x07, 0xF8, 0x64, 0x60, 0x27, // Flute
2196 
	0x22, 0x21, 0x1E, 0x06, 0xFF, 0x76, 0x00, 0x28, // Clarinet
2197 
	0x02, 0x01, 0x05, 0x00, 0xAC, 0xF2, 0x03, 0x02, // Synth
2198 
	0x21, 0x61, 0x1D, 0x07, 0x82, 0x8F, 0x10, 0x07, // Trumpet
2199 
	0x23, 0x21, 0x22, 0x17, 0xFF, 0x73, 0x00, 0x17, // Organ
2200 
	0x15, 0x11, 0x25, 0x00, 0x41, 0x71, 0x00, 0xF1, // Bells
2201 
	0x95, 0x01, 0x10, 0x0F, 0xB8, 0xAA, 0x50, 0x02, // Vibes
2202 
	0x17, 0xC1, 0x5E, 0x07, 0xFA, 0xF8, 0x22, 0x12, // Vibraphone
2203 
	0x71, 0x23, 0x11, 0x06, 0x65, 0x74, 0x10, 0x16, // Tutti
2204 
	0x01, 0x02, 0xD3, 0x05, 0xF3, 0x92, 0x83, 0xF2, // Fretless
2205 
	0x61, 0x63, 0x0C, 0x00, 0xA4, 0xFF, 0x30, 0x06, // Synth Bass
2206 
	0x21, 0x62, 0x0D, 0x00, 0xA1, 0xFF, 0x50, 0x08, // Sweep
2207 
	0x01, 0x01, 0x18, 0x0F, 0xDF, 0xF8, 0x6A, 0x6D, //rhythm 1
2208 
	0x01, 0x01, 0x00, 0x00, 0xC8, 0xD8, 0xA7, 0x48, //rhythm 2
2209 
	0x05, 0x01, 0x00, 0x00, 0xF8, 0xAA, 0x59, 0x55  //rhythm 3
2210 
};
2211
2212
2213 
//*********************************************************
2214 
//  EXPLICIT INSTANTIATION
2215 
//*********************************************************
2216
2217 
template class opl_registers_base<4>;
2218 
template class fm_engine_base<opl_registers_base<4>>;
2219
2220 
}