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◆ main openmsx / src / fdc / TurboRFDC.cc
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/*
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 * Based on code from NLMSX written by Frits Hilderink
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 *
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 * Despite the name, the class implements MSX connection to TC8566AF FDC for
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 * any MSX that uses it. To make reuse possible, it implements two sets of
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 * I/O configurations, one is used on turboR, the other on other machines with
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 * this FDC.
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 * There's also a mapper mechanism implemented. It's only used on the turboR,
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 * but all other machines only have a 16kB diskROM, so it's practically
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 * ineffective there. The mapper has 0x7FF0 as switch address. (Thanks to
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 * NYYRIKKI for this info.)
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 */
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#include "TurboRFDC.hh"
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#include "CacheLine.hh"
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#include "MSXCPU.hh"
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#include "MSXException.hh"
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#include "Rom.hh"
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#include "serialize.hh"
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#include "narrow.hh"
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namespace openmsx {
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[[nodiscard]] static TurboRFDC::Type parseType(const DeviceConfig& config)
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{
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	auto ioRegs = config.getChildData("io_regs", {});
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	if (ioRegs == "7FF2") {
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		return TurboRFDC::Type::R7FF2;
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	} else if (ioRegs == "7FF8") {
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		return TurboRFDC::Type::R7FF8;
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	} else if (ioRegs.empty()) {
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		// for backwards compatibility
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		return TurboRFDC::Type::BOTH;
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	} else {
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		throw MSXException(
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			"Invalid 'io_regs' specification: expected one of "
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			"'7FF2' or '7FF8', but got: ", ioRegs);
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	}
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}
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TurboRFDC::TurboRFDC(DeviceConfig& config)
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	: MSXFDC(config)
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	, controller(getScheduler(), drives, getCliComm(), getCurrentTime())
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	, romBlockDebug(*this, std::span{&bank, 1}, 0x4000, 0x4000, 14)
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	, memory(subspan<0x4000>(*rom))
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	, blockMask(narrow_cast<byte>((rom->size() / 0x4000) - 1))
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	, type(parseType(config))
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{
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	auto size = rom->size();
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	if ((size % 0x4000) != 0) {
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		throw MSXException("TurboRFDC rom size must be a multiple of 16kB");
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	}
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	if (size == 0) {
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		throw MSXException("TurboRFDC rom size too small");
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	}
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	if ((size / 0x4000) > 256) {
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		throw MSXException("TurboRFDC rom size too large");
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	}
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	reset(getCurrentTime());
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}
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void TurboRFDC::reset(EmuTime time)
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{
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	setBank(0);
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	controller.reset(time);
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}
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byte TurboRFDC::readMem(uint16_t address, EmuTime time_)
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{
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	EmuTime time = time_;
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	if (0x3FF0 <= (address & 0x3FFF)) {
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		// Reading or writing to this region takes 1 extra clock
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		// cycle. But only in R800 mode. Verified on a real turboR
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		// machine, it happens for all 16 positions in this region
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		// and both for reading and writing.
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		time = getCPU().waitCyclesR800(time, 1);
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		if (type != Type::R7FF8) { // turboR or BOTH
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			switch (address & 0xF) {
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			case 0x1: {
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				byte result = 0x33;
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				if (controller.diskChanged(0)) result &= ~0x10;
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				if (controller.diskChanged(1)) result &= ~0x20;
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				return result;
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			}
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			case 0x4: return controller.readStatus(time);
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			case 0x5: return controller.readDataPort(time);
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			}
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		}
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		if (type != Type::R7FF2) { // non-turboR or BOTH
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			switch (address & 0xF) {
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			case 0xA: return controller.readStatus(time);
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			case 0xB: return controller.readDataPort(time);
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			}
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		}
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	}
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	// all other stuff is handled by peekMem()
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	return TurboRFDC::peekMem(address, time);
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}
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byte TurboRFDC::peekMem(uint16_t address, EmuTime time) const
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{
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	if (0x3FF0 <= (address & 0x3FFF)) {
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		// note: this implementation requires that the handled
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		//    addresses for the MSX2 and TURBOR variants don't overlap
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		if (type != Type::R7FF8) { // turboR or BOTH
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			switch (address & 0xF) {
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			case 0x0: return bank;
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			case 0x1: {
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				// bit 0  FD2HD1  High Density detect drive 1
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				// bit 1  FD2HD2  High Density detect drive 2
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				// bit 4  FDCHG1  Disk Change detect on drive 1
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				// bit 5  FDCHG2  Disk Change detect on drive 2
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				// active low
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				byte result = 0x33;
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				if (controller.peekDiskChanged(0)) result &= ~0x10;
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				if (controller.peekDiskChanged(1)) result &= ~0x20;
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				return result;
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			}
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			case 0x4: return controller.peekStatus();
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			case 0x5: return controller.peekDataPort(time);
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			}
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		}
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		if (type != Type::R7FF2) { // non-turboR or BOTH
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			switch (address & 0xF) {
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			case 0xA: return controller.peekStatus();
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			case 0xB: return controller.peekDataPort(time);
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			}
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		}
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		switch (address & 0xF) {
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		// TODO Any idea what these 4 are? I've confirmed that on a
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		// real FS-A1GT I get these values, though the ROM dumps
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		// contain 0xFF in these locations. When looking at the ROM
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		// content via the 'RomPanasonic' mapper in slot 3-3, you can
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		// see that the ROM dumps are correct (these 4 values are not
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		// part of the ROM).
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		// This MRC post indicates that also on non-turbor machines
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		// you see these 4 values (bluemsx' post of 10-03-2013, 10:15):
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		//   http://www.msx.org/forum/msx-talk/development/finally-have-feature-request-openmsx?page=3
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		case 0xC: return 0xFC;
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		case 0xD: return 0xFC;
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		case 0xE: return 0xFF;
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		case 0xF: return 0x3F;
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		default:  return 0xFF; // other regs in this region
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		}
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	} else if ((0x4000 <= address) && (address < 0x8000)) {
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		return memory[address & 0x3FFF];
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	} else {
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		return 0xFF;
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	}
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}
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const byte* TurboRFDC::getReadCacheLine(uint16_t start) const
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{
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	if ((start & 0x3FF0) == (0x3FF0 & CacheLine::HIGH)) {
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		return nullptr;
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	} else if ((0x4000 <= start) && (start < 0x8000)) {
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		return &memory[start & 0x3FFF];
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	} else {
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		return unmappedRead.data();
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	}
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}
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void TurboRFDC::writeMem(uint16_t address, byte value, EmuTime time_)
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{
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	EmuTime time = time_;
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	if (0x3FF0 <= (address & 0x3FFF)) {
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		// See comment in readMem().
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		time = getCPU().waitCyclesR800(time, 1);
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	}
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	if (address == 0x7FF0) {
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		setBank(value);
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	} else {
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		if (type != Type::R7FF8) { // turboR or BOTH
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			switch (address & 0x3FFF) {
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			case 0x3FF2:
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				controller.writeControlReg0(value, time);
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				break;
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			case 0x3ff3:
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				controller.writeControlReg1(value, time);
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				break;
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			case 0x3FF5:
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				controller.writeDataPort(value, time);
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				break;
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			}
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		}
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		if (type != Type::R7FF2) { // non-turboR or BOTH
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			switch (address & 0x3FFF) {
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			case 0x3FF8:
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				controller.writeControlReg0(value, time);
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				break;
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			case 0x3FF9:
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				controller.writeControlReg1(value, time);
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				break;
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			case 0x3FFB:
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				controller.writeDataPort(value, time);
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				break;
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			}
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		}
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	}
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}
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void TurboRFDC::setBank(byte value)
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{
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	invalidateDeviceRCache(0x4000, 0x4000);
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	bank = value & blockMask;
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	memory = subspan<0x4000>(*rom, 0x4000 * bank);
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}
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byte* TurboRFDC::getWriteCacheLine(uint16_t address)
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{
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	if ((address == (0x7FF0 & CacheLine::HIGH)) ||
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	    ((address & 0x3FF0) == (0x3FF0 & CacheLine::HIGH))) {
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		return nullptr;
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	} else {
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		return unmappedWrite.data();
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	}
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}
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template<typename Archive>
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void TurboRFDC::serialize(Archive& ar, unsigned /*version*/)
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{
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	ar.template serializeBase<MSXFDC>(*this);
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	ar.serialize("TC8566AF", controller,
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	             "bank",     bank);
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	if constexpr (Archive::IS_LOADER) {
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		setBank(bank);
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	}
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}
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INSTANTIATE_SERIALIZE_METHODS(TurboRFDC);
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REGISTER_MSXDEVICE(TurboRFDC, "TurboRFDC");
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} // namespace openmsx