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◆ main openmsx / src / sound / MSXFmPac.cc
3.4 KiB · C++ · last changed chore(): initial commit 1 month ago source blame history raw
e8555c89 Andy McCall 1 
#include "MSXFmPac.hh"
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#include "CacheLine.hh"
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#include "serialize.hh"
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namespace openmsx {
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static constexpr const char* const PAC_Header = "PAC2 BACKUP DATA";
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MSXFmPac::MSXFmPac(DeviceConfig& config)
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	: MSXMusicBase(config)
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	, sram(getName() + " SRAM", 0x1FFE, config, PAC_Header)
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	, romBlockDebug(*this, std::span{&bank, 1}, 0x4000, 0x4000, 14)
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{
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	reset(getCurrentTime());
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}
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void MSXFmPac::reset(EmuTime time)
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{
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	MSXMusicBase::reset(time);
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	enable = 0;
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	sramEnabled = false;
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	bank = 0;
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	r1ffe = r1fff = 0; // actual value doesn't matter as long
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	                   // as it's not the magic combination
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}
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void MSXFmPac::writeIO(uint16_t port, byte value, EmuTime time)
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{
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	if (enable & 1) {
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		MSXMusicBase::writeIO(port, value, time);
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	}
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}
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byte MSXFmPac::readMem(uint16_t address, EmuTime /*time*/)
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{
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	address &= 0x3FFF;
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	switch (address) {
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	case 0x3FF6:
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		return enable;
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	case 0x3FF7:
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		return bank;
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	default:
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		if (sramEnabled) {
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			if (address < 0x1FFE) {
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				return sram[address];
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			} else if (address == 0x1FFE) {
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				return r1ffe; // always 0x4D
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			} else if (address == 0x1FFF) {
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				return r1fff; // always 0x69
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			} else {
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				return 0xFF;
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			}
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		} else {
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			return rom[bank * 0x4000 + address];
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		}
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	}
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}
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const byte* MSXFmPac::getReadCacheLine(uint16_t address) const
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{
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	address &= 0x3FFF;
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	if (address == (0x3FF6 & CacheLine::HIGH)) {
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		return nullptr;
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	}
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	if (sramEnabled) {
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		if (address < (0x1FFE & CacheLine::HIGH)) {
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			return &sram[address];
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		} else if (address == (0x1FFE & CacheLine::HIGH)) {
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			return nullptr;
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		} else {
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			return unmappedRead.data();
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		}
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	} else {
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		return &rom[bank * 0x4000 + address];
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	}
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}
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void MSXFmPac::writeMem(uint16_t address, byte value, EmuTime time)
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{
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	// 'enable' has no effect for memory mapped access
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	//   (thanks to BiFiMSX for investigating this)
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	address &= 0x3FFF;
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	switch (address) {
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	case 0x1FFE:
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		if (!(enable & 0x10)) {
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			r1ffe = value;
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			checkSramEnable();
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		}
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		break;
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	case 0x1FFF:
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		if (!(enable & 0x10)) {
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			r1fff = value;
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			checkSramEnable();
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		}
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		break;
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	case 0x3FF4: // address
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	case 0x3FF5: // data
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		writePort(address & 1, value, time);
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		break;
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	case 0x3FF6:
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		enable = value & 0x11;
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		if (enable & 0x10) {
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			r1ffe = r1fff = 0; // actual value not important
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			checkSramEnable();
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		}
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		break;
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	case 0x3FF7: {
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		if (byte newBank = value & 0x03; bank != newBank) {
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			bank = newBank;
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			invalidateDeviceRCache();
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		}
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		break;
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	}
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	default:
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		if (sramEnabled && (address < 0x1FFE)) {
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			sram.write(address, value);
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		}
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	}
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}
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byte* MSXFmPac::getWriteCacheLine(uint16_t address)
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{
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	address &= 0x3FFF;
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	if (address == (0x1FFE & CacheLine::HIGH)) {
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		return nullptr;
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	}
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	if (address == (0x3FF4 & CacheLine::HIGH)) {
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		return nullptr;
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	}
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	if (sramEnabled && (address < 0x1FFE)) {
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		return nullptr;
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	} else {
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		return unmappedWrite.data();
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	}
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}
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void MSXFmPac::checkSramEnable()
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{
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	bool newEnabled = (r1ffe == 0x4D) && (r1fff == 0x69);
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	if (sramEnabled != newEnabled) {
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		sramEnabled = newEnabled;
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		invalidateDeviceRWCache();
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	}
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}
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template<typename Archive>
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void MSXFmPac::serialize(Archive& ar, unsigned version)
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{
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	ar.template serializeInlinedBase<MSXMusicBase>(*this, version);
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	ar.serialize("sram",   sram,
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	             "enable", enable,
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	             "bank",   bank,
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	             "r1ffe",  r1ffe,
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	             "r1fff",  r1fff);
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	if constexpr (Archive::IS_LOADER) {
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		// sramEnabled can be calculated
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		checkSramEnable();
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	}
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}
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INSTANTIATE_SERIALIZE_METHODS(MSXFmPac);
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REGISTER_MSXDEVICE(MSXFmPac, "FM-PAC");
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} // namespace openmsx