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◆ main openmsx / src / memory / RomAscii16_2.cc
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// ASCII 16kB based cartridges with SRAM
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//
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// Examples 2kB SRAM: Daisenryaku, Harry Fox MSX Special, Hydlide 2, Jyansei
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// Examples 8kB SRAM: A-Train
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//
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// this type is is almost completely a ASCII16 cartridge
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// However, it has 2 or 8kB of SRAM (and 128 kB ROM)
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// Use value 0x10 to select the SRAM.
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// SRAM in page 1 => read-only
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// SRAM in page 2 => read-write
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// The SRAM is mirrored in the 16 kB block
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//
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// The address to change banks (from ASCII16):
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//  first  16kb: 0x6000 - 0x67FF (0x6000 used)
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//  second 16kb: 0x7000 - 0x77FF (0x7000 and 0x77FF used)
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#include "RomAscii16_2.hh"
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#include "SRAM.hh"
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#include "serialize.hh"
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#include <memory>
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namespace openmsx {
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RomAscii16_2::RomAscii16_2(const DeviceConfig& config, Rom&& rom_, SubType subType)
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	: RomAscii16kB(config, std::move(rom_))
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{
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	unsigned size = (subType == SubType::ASCII16_8) ? 0x2000 // 8kB
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	                                                : 0x0800; // 2kB
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	sram = std::make_unique<SRAM>(getName() + " SRAM", size, config);
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	reset(EmuTime::dummy());
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}
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void RomAscii16_2::reset(EmuTime time)
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{
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	sramEnabled = 0;
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	RomAscii16kB::reset(time);
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}
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byte RomAscii16_2::readMem(uint16_t address, EmuTime time)
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{
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	if ((1 << (address >> 14)) & sramEnabled) {
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		return (*sram)[address & (sram->size() - 1)];
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	} else {
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		return RomAscii16kB::readMem(address, time);
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	}
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}
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const byte* RomAscii16_2::getReadCacheLine(uint16_t address) const
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{
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	if ((1 << (address >> 14)) & sramEnabled) {
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		return &(*sram)[address & (sram->size() - 1)];
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	} else {
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		return RomAscii16kB::getReadCacheLine(address);
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	}
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}
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void RomAscii16_2::writeMem(uint16_t address, byte value, EmuTime /*time*/)
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{
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	if ((0x6000 <= address) && (address < 0x7800) && !(address & 0x0800)) {
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		// bank switch
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		byte region = ((address >> 12) & 1) + 1;
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		if (value == 0x10) {
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			// SRAM block
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			sramEnabled |= (1 << region);
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		} else {
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			// ROM block
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			setRom(region, value);
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			sramEnabled &= byte(~(1 << region));
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		}
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		invalidateDeviceRWCache(0x4000 * region, 0x4000);
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	} else {
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		// write sram
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		if ((1 << (address >> 14)) & sramEnabled & 0x04) {
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			sram->write(address & (sram->size() - 1), value);
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		}
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	}
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}
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byte* RomAscii16_2::getWriteCacheLine(uint16_t address)
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{
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	if ((1 << (address >> 14)) & sramEnabled & 0x04) {
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		// write sram
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		return nullptr;
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	} else {
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		return RomAscii16kB::getWriteCacheLine(address);
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	}
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}
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template<typename Archive>
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void RomAscii16_2::serialize(Archive& ar, unsigned /*version*/)
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{
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	ar.template serializeBase<RomAscii16kB>(*this);
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	ar.serialize("sramEnabled", sramEnabled);
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}
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INSTANTIATE_SERIALIZE_METHODS(RomAscii16_2);
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REGISTER_MSXDEVICE(RomAscii16_2, "RomAscii16_2");
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} // namespace openmsx