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◆ main openmsx / src / memory / RomMitsubishiMLTS2.cc
2.4 KiB · C++ · last changed chore(): initial commit 1 month ago source blame history raw
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#include "RomMitsubishiMLTS2.hh"
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#include "CacheLine.hh"
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#include "serialize.hh"
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namespace openmsx {
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RomMitsubishiMLTS2::RomMitsubishiMLTS2(const DeviceConfig& config, Rom&& rom_)
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	: Rom8kBBlocks(config, std::move(rom_))
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	, ram(config, getName() + " RAM", "ML-TS2 RAM", 0x2000)
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{
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	reset(EmuTime::dummy());
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}
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void RomMitsubishiMLTS2::reset(EmuTime /*time*/)
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{
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	setRom(2, 0);
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}
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void RomMitsubishiMLTS2::writeMem(uint16_t address, byte value, EmuTime /*time*/)
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{
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	// TODO What are these 4 registers? Are there any more?
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	//      Is there any mirroring going on?
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	if        (address == 0x7f00) {
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		// TODO
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	} else if (address == 0x7f01) {
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		// TODO
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	} else if (address == 0x7f02) {
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		// TODO
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	} else if (address == 0x7f03) {
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		// TODO
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	} else if (address == 0x7FC0) {
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		byte bank = value & 0b111;
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		setRom(2, bank);
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	} else if ((0x6000 <= address) && (address < 0x8000)) {
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		ram[address & 0x1FFF] = value;
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	}
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}
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byte RomMitsubishiMLTS2::readMem(uint16_t address, EmuTime time)
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{
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	return peekMem(address, time);
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}
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byte RomMitsubishiMLTS2::peekMem(uint16_t address, EmuTime time) const
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{
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	// TODO What are these 4 registers? Are there any more?
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	//      Is there any mirroring going on?
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	//      Is the bank select register readable? (0x7fc0)
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	if        (address == 0x7f00) {
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		return 0xff; // TODO
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	} else if (address == 0x7f01) {
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		return 0xff; // TODO
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	} else if (address == 0x7f02) {
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		return 0xff; // TODO
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	} else if (address == 0x7f03) {
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		return 0xff; // TODO
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	} else if ((0x6000 <= address) && (address < 0x8000)) {
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		return ram[address & 0x1FFF];
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	} else {
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		return Rom8kBBlocks::peekMem(address, time);
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	}
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}
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const byte* RomMitsubishiMLTS2::getReadCacheLine(uint16_t address) const
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{
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	if (address == (0x7FC0 & CacheLine::HIGH)) return nullptr;
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	if ((0x6000 <= address) && (address < 0x8000)) {
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		return &ram[address & 0x1FFF];
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	}
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	return Rom8kBBlocks::getReadCacheLine(address);
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}
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byte* RomMitsubishiMLTS2::getWriteCacheLine(uint16_t address)
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{
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	if (address == (0x7FC0 & CacheLine::HIGH)) return nullptr;
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	if ((0x6000 <= address) && (address < 0x8000)) {
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		return &ram[address & 0x1FFF];
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	}
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	return unmappedWrite.data();
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}
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template<typename Archive>
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void RomMitsubishiMLTS2::serialize(Archive& ar, unsigned /*version*/)
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{
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	ar.template serializeBase<Rom8kBBlocks>(*this);
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}
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INSTANTIATE_SERIALIZE_METHODS(RomMitsubishiMLTS2);
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REGISTER_MSXDEVICE(RomMitsubishiMLTS2, "RomMitsubishiMLTS2");
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} // namespace openmsx