OXYGENHUB
◆ main openmsx / src / memory / RomZemina90in1.cc
1.7 KiB · C++ · last changed chore(): initial commit 1 month ago source blame history raw
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// Zemina 90-in-1 cartridge
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//
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//  90 in 1 uses Port &H77 for mapping:
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//    bits 0-5: selected 16KB page
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//    bits 6-7: addressing mode...
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//      00 = same page at 4000-7FFF and 8000-BFFF (normal mode)
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//      01 = same page at 4000-7FFF and 8000-BFFF (normal mode)
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//      10 = [page AND 3E] at 4000-7FFF, [page AND 3E OR 01] at 8000-BFFF
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//           (32KB mode)
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//      11 = same page at 4000-7FFF and 8000-BFFF, but 8000-BFFF has high 8KB
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//           and low 8KB swapped (Namco mode)
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#include "RomZemina90in1.hh"
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#include "MSXCPUInterface.hh"
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#include "serialize.hh"
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#include "unreachable.hh"
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namespace openmsx {
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RomZemina90in1::RomZemina90in1(const DeviceConfig& config, Rom&& rom_)
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	: Rom8kBBlocks(config, std::move(rom_))
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{
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	reset(EmuTime::dummy());
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	getCPUInterface().register_IO_Out(0x77, this);
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}
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RomZemina90in1::~RomZemina90in1()
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{
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	getCPUInterface().unregister_IO_Out(0x77, this);
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}
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void RomZemina90in1::reset(EmuTime time)
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{
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	setUnmapped(0);
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	setUnmapped(1);
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	setUnmapped(6);
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	setUnmapped(7);
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	writeIO(0x77, 0, time);
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}
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void RomZemina90in1::writeIO(uint16_t /*port*/, byte value, EmuTime /*time*/)
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{
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	byte page = 2 * (value & 0x3F);
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	switch (value & 0xC0) {
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	case 0x00:
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	case 0x40:
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		setRom(2, page + 0);
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		setRom(3, page + 1);
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		setRom(4, page + 0);
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		setRom(5, page + 1);
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		break;
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	case 0x80:
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		setRom(2, (page & ~2) + 0);
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		setRom(3, (page & ~2) + 1);
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		setRom(4, (page |  2) + 0);
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		setRom(5, (page |  2) + 1);
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		break;
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	case 0xC0:
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		setRom(2, page + 0);
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		setRom(3, page + 1);
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		setRom(4, page + 1);
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		setRom(5, page + 0);
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		break;
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	default:
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		UNREACHABLE;
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	}
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}
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byte* RomZemina90in1::getWriteCacheLine(uint16_t /*address*/)
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{
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	return unmappedWrite.data();
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}
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REGISTER_MSXDEVICE(RomZemina90in1, "RomZemina90in1");
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} // namespace openmsx